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author | Thierry Reding <thierry.reding@avionic-design.de> | 2012-04-13 15:08:08 +0200 |
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committer | Joerg Roedel <joerg.roedel@amd.com> | 2012-04-16 13:57:16 +0200 |
commit | 7cffae421e3cd29410ef4d75f2244655fdde3b60 (patch) | |
tree | 7d618d7d3600bb21de11aa976ec5795188f563a5 | |
parent | 543f3f33b6165585f755858baaa95530513f5c1e (diff) | |
download | op-kernel-dev-7cffae421e3cd29410ef4d75f2244655fdde3b60.zip op-kernel-dev-7cffae421e3cd29410ef4d75f2244655fdde3b60.tar.gz |
iommu: tegra/gart: Add device tree support
This commit adds device tree support for the GART hardware available on
NVIDIA Tegra 20 SoCs.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
-rw-r--r-- | Documentation/devicetree/bindings/iommu/nvidia,tegra20-gart.txt | 14 | ||||
-rw-r--r-- | drivers/iommu/tegra-gart.c | 11 |
2 files changed, 25 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/iommu/nvidia,tegra20-gart.txt b/Documentation/devicetree/bindings/iommu/nvidia,tegra20-gart.txt new file mode 100644 index 0000000..2d87b91 --- /dev/null +++ b/Documentation/devicetree/bindings/iommu/nvidia,tegra20-gart.txt @@ -0,0 +1,14 @@ +NVIDIA Tegra 20 GART + +Required properties: +- compatible: "nvidia,tegra20-gart" +- reg: Two pairs of cells specifying the physical address and size of + the memory controller registers and the GART aperture respectively. + +Example: + + gart: gart@7000f000 { + compatible = "nvidia,tegra20-gart"; + reg = < 0x7000f000 0x00000100 /* controller registers */ + 0x58000000 0x02000000 >; /* GART aperture */ + }; diff --git a/drivers/iommu/tegra-gart.c b/drivers/iommu/tegra-gart.c index f6bc1e6..40533bb 100644 --- a/drivers/iommu/tegra-gart.c +++ b/drivers/iommu/tegra-gart.c @@ -29,6 +29,7 @@ #include <linux/device.h> #include <linux/io.h> #include <linux/iommu.h> +#include <linux/of.h> #include <asm/cacheflush.h> @@ -422,6 +423,14 @@ const struct dev_pm_ops tegra_gart_pm_ops = { .resume = tegra_gart_resume, }; +#ifdef CONFIG_OF +static struct of_device_id tegra_gart_of_match[] __devinitdata = { + { .compatible = "nvidia,tegra20-gart", }, + { }, +}; +MODULE_DEVICE_TABLE(of, tegra_gart_of_match); +#endif + static struct platform_driver tegra_gart_driver = { .probe = tegra_gart_probe, .remove = tegra_gart_remove, @@ -429,6 +438,7 @@ static struct platform_driver tegra_gart_driver = { .owner = THIS_MODULE, .name = "tegra-gart", .pm = &tegra_gart_pm_ops, + .of_match_table = of_match_ptr(tegra_gart_of_match), }, }; @@ -448,4 +458,5 @@ module_exit(tegra_gart_exit); MODULE_DESCRIPTION("IOMMU API for GART in Tegra20"); MODULE_AUTHOR("Hiroshi DOYU <hdoyu@nvidia.com>"); +MODULE_ALIAS("platform:tegra-gart"); MODULE_LICENSE("GPL v2"); |