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authorJohn Crispin <blogic@openwrt.org>2015-11-05 03:59:58 +0100
committerRalf Baechle <ralf@linux-mips.org>2015-11-11 08:38:03 +0100
commit73afa6c4208257ea1733a03918fea731a18131e7 (patch)
tree6c04603025058017899ace02e0fb50a593e2978e
parentb361bd762e7724e660a44955ae4840aa984e3871 (diff)
downloadop-kernel-dev-73afa6c4208257ea1733a03918fea731a18131e7.zip
op-kernel-dev-73afa6c4208257ea1733a03918fea731a18131e7.tar.gz
MIPS: ralink: Add tty detection
MT7688 has several uarts that can be used for console. There are several boards in the wild, that use ttyS1 or ttyS2. This patch applies a simply autodetection routine to figure out which ttyS the bootloader used as console. The uarts come up in 6 bit mode by default. The bootloader will have set 8 bit mode on the console. Find that 8bit tty and use it. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/11459/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--arch/mips/ralink/early_printk.c26
1 files changed, 26 insertions, 0 deletions
diff --git a/arch/mips/ralink/early_printk.c b/arch/mips/ralink/early_printk.c
index 255d695..3c59ffe 100644
--- a/arch/mips/ralink/early_printk.c
+++ b/arch/mips/ralink/early_printk.c
@@ -25,11 +25,13 @@
#define MT7628_CHIP_NAME1 0x20203832
#define UART_REG_TX 0x04
+#define UART_REG_LCR 0x0c
#define UART_REG_LSR 0x14
#define UART_REG_LSR_RT2880 0x1c
static __iomem void *uart_membase = (__iomem void *) KSEG1ADDR(EARLY_UART_BASE);
static __iomem void *chipid_membase = (__iomem void *) KSEG1ADDR(CHIPID_BASE);
+static int init_complete;
static inline void uart_w32(u32 val, unsigned reg)
{
@@ -47,8 +49,32 @@ static inline int soc_is_mt7628(void)
(__raw_readl(chipid_membase) == MT7628_CHIP_NAME1);
}
+static void find_uart_base(void)
+{
+ int i;
+
+ if (!soc_is_mt7628())
+ return;
+
+ for (i = 0; i < 3; i++) {
+ u32 reg = uart_r32(UART_REG_LCR + (0x100 * i));
+
+ if (!reg)
+ continue;
+
+ uart_membase = (__iomem void *) KSEG1ADDR(EARLY_UART_BASE +
+ (0x100 * i));
+ break;
+ }
+}
+
void prom_putchar(unsigned char ch)
{
+ if (!init_complete) {
+ find_uart_base();
+ init_complete = 1;
+ }
+
if (IS_ENABLED(CONFIG_SOC_MT7621) || soc_is_mt7628()) {
uart_w32(ch, UART_TX);
while ((uart_r32(UART_REG_LSR) & UART_LSR_THRE) == 0)
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