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authorLinus Torvalds <torvalds@linux-foundation.org>2014-10-18 09:30:41 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2014-10-18 09:30:41 -0700
commitffd8221bc348f8c282d1271883dbe629ea8ae289 (patch)
tree186cf97088b471362257bfecbe2c6495781fd594
parente0a9272c616838109fc5988ab154dc10670eb15e (diff)
parentf4da3628dc7c32a59d1fb7116bb042e6f436d611 (diff)
downloadop-kernel-dev-ffd8221bc348f8c282d1271883dbe629ea8ae289.zip
op-kernel-dev-ffd8221bc348f8c282d1271883dbe629ea8ae289.tar.gz
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc
Pull Sparc bugfix from David Miller: "Sparc64 AES ctr mode bug fix" * git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc: sparc64: Fix FPU register corruption with AES crypto offload.
-rw-r--r--arch/sparc/include/asm/visasm.h8
-rw-r--r--arch/sparc/lib/NG4memcpy.S14
2 files changed, 21 insertions, 1 deletions
diff --git a/arch/sparc/include/asm/visasm.h b/arch/sparc/include/asm/visasm.h
index b266737..1f0aa20 100644
--- a/arch/sparc/include/asm/visasm.h
+++ b/arch/sparc/include/asm/visasm.h
@@ -39,6 +39,14 @@
297: wr %o5, FPRS_FEF, %fprs; \
298:
+#define VISEntryHalfFast(fail_label) \
+ rd %fprs, %o5; \
+ andcc %o5, FPRS_FEF, %g0; \
+ be,pt %icc, 297f; \
+ nop; \
+ ba,a,pt %xcc, fail_label; \
+297: wr %o5, FPRS_FEF, %fprs;
+
#define VISExitHalf \
wr %o5, 0, %fprs;
diff --git a/arch/sparc/lib/NG4memcpy.S b/arch/sparc/lib/NG4memcpy.S
index 9cf2ee0..140527a 100644
--- a/arch/sparc/lib/NG4memcpy.S
+++ b/arch/sparc/lib/NG4memcpy.S
@@ -41,6 +41,10 @@
#endif
#endif
+#if !defined(EX_LD) && !defined(EX_ST)
+#define NON_USER_COPY
+#endif
+
#ifndef EX_LD
#define EX_LD(x) x
#endif
@@ -197,9 +201,13 @@ FUNC_NAME: /* %o0=dst, %o1=src, %o2=len */
mov EX_RETVAL(%o3), %o0
.Llarge_src_unaligned:
+#ifdef NON_USER_COPY
+ VISEntryHalfFast(.Lmedium_vis_entry_fail)
+#else
+ VISEntryHalf
+#endif
andn %o2, 0x3f, %o4
sub %o2, %o4, %o2
- VISEntryHalf
alignaddr %o1, %g0, %g1
add %o1, %o4, %o1
EX_LD(LOAD(ldd, %g1 + 0x00, %f0))
@@ -240,6 +248,10 @@ FUNC_NAME: /* %o0=dst, %o1=src, %o2=len */
nop
ba,a,pt %icc, .Lmedium_unaligned
+#ifdef NON_USER_COPY
+.Lmedium_vis_entry_fail:
+ or %o0, %o1, %g2
+#endif
.Lmedium:
LOAD(prefetch, %o1 + 0x40, #n_reads_strong)
andcc %g2, 0x7, %g0
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