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| author | Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> | 2014-04-30 14:56:33 +0200 |
|---|---|---|
| committer | Jason Cooper <jason@lakedaemon.net> | 2014-05-05 00:52:19 +0000 |
| commit | 2ab516adb3489347331a89070a37eaf1907679d8 (patch) | |
| tree | 8dc8add951ea29fb3b13fe916b65d30292015ff1 | |
| parent | a9483969815e90d6a5e25c7c941bb3d8d152f2bd (diff) | |
| download | op-kernel-dev-2ab516adb3489347331a89070a37eaf1907679d8.zip op-kernel-dev-2ab516adb3489347331a89070a37eaf1907679d8.tar.gz | |
ARM: dts: kirkwood: add pinctrl node to common SoC include
All Kirkwood SoCs have their pinctrl registers at the same address.
Instead of replaying the same reg property on each SoC, have the
reg property set in the common SoC file already. This also allows
us to move common pinctrl settings to this node later on.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lkml.kernel.org/r/1398862602-29595-7-git-send-email-sebastian.hesselbarth@gmail.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| -rw-r--r-- | arch/arm/boot/dts/kirkwood-6192.dtsi | 1 | ||||
| -rw-r--r-- | arch/arm/boot/dts/kirkwood-6281.dtsi | 1 | ||||
| -rw-r--r-- | arch/arm/boot/dts/kirkwood-6282.dtsi | 1 | ||||
| -rw-r--r-- | arch/arm/boot/dts/kirkwood-98dx4122.dtsi | 1 | ||||
| -rw-r--r-- | arch/arm/boot/dts/kirkwood.dtsi | 5 |
5 files changed, 5 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/kirkwood-6192.dtsi b/arch/arm/boot/dts/kirkwood-6192.dtsi index 4f1eef3..c008e9a 100644 --- a/arch/arm/boot/dts/kirkwood-6192.dtsi +++ b/arch/arm/boot/dts/kirkwood-6192.dtsi @@ -37,7 +37,6 @@ ocp@f1000000 { pinctrl: pin-controller@10000 { compatible = "marvell,88f6192-pinctrl"; - reg = <0x10000 0x20>; pmx_nand: pmx-nand { marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3", diff --git a/arch/arm/boot/dts/kirkwood-6281.dtsi b/arch/arm/boot/dts/kirkwood-6281.dtsi index d95a7a9..3674a9b 100644 --- a/arch/arm/boot/dts/kirkwood-6281.dtsi +++ b/arch/arm/boot/dts/kirkwood-6281.dtsi @@ -37,7 +37,6 @@ ocp@f1000000 { pinctrl: pin-controller@10000 { compatible = "marvell,88f6281-pinctrl"; - reg = <0x10000 0x20>; pmx_nand: pmx-nand { marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3", diff --git a/arch/arm/boot/dts/kirkwood-6282.dtsi b/arch/arm/boot/dts/kirkwood-6282.dtsi index 523d6fe..89a6ba1 100644 --- a/arch/arm/boot/dts/kirkwood-6282.dtsi +++ b/arch/arm/boot/dts/kirkwood-6282.dtsi @@ -58,7 +58,6 @@ pinctrl: pin-controller@10000 { compatible = "marvell,88f6282-pinctrl"; - reg = <0x10000 0x20>; pmx_nand: pmx-nand { marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3", diff --git a/arch/arm/boot/dts/kirkwood-98dx4122.dtsi b/arch/arm/boot/dts/kirkwood-98dx4122.dtsi index c59e7b7..4a2d1b1 100644 --- a/arch/arm/boot/dts/kirkwood-98dx4122.dtsi +++ b/arch/arm/boot/dts/kirkwood-98dx4122.dtsi @@ -2,7 +2,6 @@ ocp@f1000000 { pinctrl: pin-controller@10000 { compatible = "marvell,98dx4122-pinctrl"; - reg = <0x10000 0x20>; pmx_nand: pmx-nand { marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3", diff --git a/arch/arm/boot/dts/kirkwood.dtsi b/arch/arm/boot/dts/kirkwood.dtsi index 2570e0f..028003e 100644 --- a/arch/arm/boot/dts/kirkwood.dtsi +++ b/arch/arm/boot/dts/kirkwood.dtsi @@ -71,6 +71,11 @@ #address-cells = <1>; #size-cells = <1>; + pinctrl: pin-controller@10000 { + /* set compatible property in SoC file */ + reg = <0x10000 0x20>; + }; + core_clk: core-clocks@10030 { compatible = "marvell,kirkwood-core-clock"; reg = <0x10030 0x4>; |
