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authorAndrew Bresticker <abrestic@chromium.org>2014-09-18 14:47:08 -0700
committerRalf Baechle <ralf@linux-mips.org>2014-11-24 07:44:52 +0100
commitafe8dc254711b72ba8144295f4a8fcc66d30572d (patch)
tree5aacea8dcab8ead8ce770fd462c130d0c88e9257
parent0f84c305351c993e4307e1e8c128d44760314e31 (diff)
downloadop-kernel-dev-afe8dc254711b72ba8144295f4a8fcc66d30572d.zip
op-kernel-dev-afe8dc254711b72ba8144295f4a8fcc66d30572d.tar.gz
MIPS: Rename mips_cpu_intc_init() -> mips_cpu_irq_of_init()
mips_cpu_intc_init() is used for DT-based initialization of the CPU IRQ domain. Give it a more appropriate name. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Reviewed-by: Qais Yousef <qais.yousef@imgtec.com> Tested-by: Qais Yousef <qais.yousef@imgtec.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Andrew Bresticker <abrestic@chromium.org> Cc: Jeffrey Deans <jeffrey.deans@imgtec.com> Cc: Markos Chandras <markos.chandras@imgtec.com> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Qais Yousef <qais.yousef@imgtec.com> Cc: Jonas Gorski <jogo@openwrt.org> Cc: John Crispin <blogic@openwrt.org> Cc: David Daney <ddaney.cavm@gmail.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/7800/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--Documentation/devicetree/bindings/mips/cpu_irq.txt4
-rw-r--r--arch/mips/include/asm/irq_cpu.h4
-rw-r--r--arch/mips/kernel/irq_cpu.c4
-rw-r--r--arch/mips/ralink/irq.c2
4 files changed, 7 insertions, 7 deletions
diff --git a/Documentation/devicetree/bindings/mips/cpu_irq.txt b/Documentation/devicetree/bindings/mips/cpu_irq.txt
index 13aa4b6..fc149f3 100644
--- a/Documentation/devicetree/bindings/mips/cpu_irq.txt
+++ b/Documentation/devicetree/bindings/mips/cpu_irq.txt
@@ -1,6 +1,6 @@
MIPS CPU interrupt controller
-On MIPS the mips_cpu_intc_init() helper can be used to initialize the 8 CPU
+On MIPS the mips_cpu_irq_of_init() helper can be used to initialize the 8 CPU
IRQs from a devicetree file and create a irq_domain for IRQ controller.
With the irq_domain in place we can describe how the 8 IRQs are wired to the
@@ -36,7 +36,7 @@ Example devicetree:
Example platform irq.c:
static struct of_device_id __initdata of_irq_ids[] = {
- { .compatible = "mti,cpu-interrupt-controller", .data = mips_cpu_intc_init },
+ { .compatible = "mti,cpu-interrupt-controller", .data = mips_cpu_irq_of_init },
{ .compatible = "ralink,rt2880-intc", .data = intc_of_init },
{},
};
diff --git a/arch/mips/include/asm/irq_cpu.h b/arch/mips/include/asm/irq_cpu.h
index 3f11fdb..39a160b 100644
--- a/arch/mips/include/asm/irq_cpu.h
+++ b/arch/mips/include/asm/irq_cpu.h
@@ -19,8 +19,8 @@ extern void rm9k_cpu_irq_init(void);
#ifdef CONFIG_IRQ_DOMAIN
struct device_node;
-extern int mips_cpu_intc_init(struct device_node *of_node,
- struct device_node *parent);
+extern int mips_cpu_irq_of_init(struct device_node *of_node,
+ struct device_node *parent);
#endif
#endif /* _ASM_IRQ_CPU_H */
diff --git a/arch/mips/kernel/irq_cpu.c b/arch/mips/kernel/irq_cpu.c
index b097f7d..ca98a9f 100644
--- a/arch/mips/kernel/irq_cpu.c
+++ b/arch/mips/kernel/irq_cpu.c
@@ -135,8 +135,8 @@ void __init mips_cpu_irq_init(void)
__mips_cpu_irq_init(NULL);
}
-int __init mips_cpu_intc_init(struct device_node *of_node,
- struct device_node *parent)
+int __init mips_cpu_irq_of_init(struct device_node *of_node,
+ struct device_node *parent)
{
__mips_cpu_irq_init(of_node);
return 0;
diff --git a/arch/mips/ralink/irq.c b/arch/mips/ralink/irq.c
index 781b3d1..0495011 100644
--- a/arch/mips/ralink/irq.c
+++ b/arch/mips/ralink/irq.c
@@ -173,7 +173,7 @@ static int __init intc_of_init(struct device_node *node,
}
static struct of_device_id __initdata of_irq_ids[] = {
- { .compatible = "mti,cpu-interrupt-controller", .data = mips_cpu_intc_init },
+ { .compatible = "mti,cpu-interrupt-controller", .data = mips_cpu_irq_of_init },
{ .compatible = "ralink,rt2880-intc", .data = intc_of_init },
{},
};
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