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| author | Josh Cartwright <josh.cartwright@ni.com> | 2013-01-21 19:57:41 +0100 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2013-01-21 13:56:46 -0800 |
| commit | 2326669ccbd901dffeefb66ed742c294b2e8041b (patch) | |
| tree | 2bee32550a8e14ba0f930e65011a4ff00841b32c | |
| parent | 1f9db0921f212ad8fdf4bacfdf23590e64272f90 (diff) | |
| download | op-kernel-dev-2326669ccbd901dffeefb66ed742c294b2e8041b.zip op-kernel-dev-2326669ccbd901dffeefb66ed742c294b2e8041b.tar.gz | |
serial: xilinx_uartps: Get clock rate info from dts
Add support for specifying clock information for the uart clk via the
device tree. This eliminates the need to hardcode rates in the device
tree.
Signed-off-by: Josh Cartwright <josh.cartwright@ni.com>
Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| -rw-r--r-- | arch/arm/boot/dts/zynq-7000.dtsi | 4 | ||||
| -rw-r--r-- | drivers/tty/serial/xilinx_uartps.c | 34 |
2 files changed, 21 insertions, 17 deletions
diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi index 401c126..5914b56 100644 --- a/arch/arm/boot/dts/zynq-7000.dtsi +++ b/arch/arm/boot/dts/zynq-7000.dtsi @@ -44,14 +44,14 @@ compatible = "xlnx,xuartps"; reg = <0xE0000000 0x1000>; interrupts = <0 27 4>; - clock = <50000000>; + clocks = <&uart_clk 0>; }; uart1: uart@e0001000 { compatible = "xlnx,xuartps"; reg = <0xE0001000 0x1000>; interrupts = <0 50 4>; - clock = <50000000>; + clocks = <&uart_clk 1>; }; slcr: slcr@f8000000 { diff --git a/drivers/tty/serial/xilinx_uartps.c b/drivers/tty/serial/xilinx_uartps.c index 82a3151..e426603 100644 --- a/drivers/tty/serial/xilinx_uartps.c +++ b/drivers/tty/serial/xilinx_uartps.c @@ -17,6 +17,7 @@ #include <linux/tty.h> #include <linux/tty_flip.h> #include <linux/console.h> +#include <linux/clk.h> #include <linux/irq.h> #include <linux/io.h> #include <linux/of.h> @@ -936,16 +937,18 @@ static int xuartps_probe(struct platform_device *pdev) int rc; struct uart_port *port; struct resource *res, *res2; - int clk = 0; + struct clk *clk; - const unsigned int *prop; - - prop = of_get_property(pdev->dev.of_node, "clock", NULL); - if (prop) - clk = be32_to_cpup(prop); - if (!clk) { + clk = of_clk_get(pdev->dev.of_node, 0); + if (IS_ERR(clk)) { dev_err(&pdev->dev, "no clock specified\n"); - return -ENODEV; + return PTR_ERR(clk); + } + + rc = clk_prepare_enable(clk); + if (rc) { + dev_err(&pdev->dev, "could not enable clock\n"); + return -EBUSY; } res = platform_get_resource(pdev, IORESOURCE_MEM, 0); @@ -970,7 +973,8 @@ static int xuartps_probe(struct platform_device *pdev) port->mapbase = res->start; port->irq = res2->start; port->dev = &pdev->dev; - port->uartclk = clk; + port->uartclk = clk_get_rate(clk); + port->private_data = clk; dev_set_drvdata(&pdev->dev, port); rc = uart_add_one_port(&xuartps_uart_driver, port); if (rc) { @@ -992,14 +996,14 @@ static int xuartps_probe(struct platform_device *pdev) static int xuartps_remove(struct platform_device *pdev) { struct uart_port *port = dev_get_drvdata(&pdev->dev); - int rc = 0; + struct clk *clk = port->private_data; + int rc; /* Remove the xuartps port from the serial core */ - if (port) { - rc = uart_remove_one_port(&xuartps_uart_driver, port); - dev_set_drvdata(&pdev->dev, NULL); - port->mapbase = 0; - } + rc = uart_remove_one_port(&xuartps_uart_driver, port); + dev_set_drvdata(&pdev->dev, NULL); + port->mapbase = 0; + clk_disable_unprepare(clk); return rc; } |
