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| author | Steve Wise <swise@opengridcomputing.com> | 2010-08-28 13:35:05 +0000 |
|---|---|---|
| committer | Roland Dreier <rolandd@cisco.com> | 2010-09-02 14:52:21 -0700 |
| commit | dc4e96ce2dceb649224ee84f83592aac8c54c9b7 (patch) | |
| tree | 353967b077a02a3ed4f003a2a8abe36f3136d5f8 | |
| parent | 320b2b8de12698082609ebbc1a17165727f4c893 (diff) | |
| download | op-kernel-dev-dc4e96ce2dceb649224ee84f83592aac8c54c9b7.zip op-kernel-dev-dc4e96ce2dceb649224ee84f83592aac8c54c9b7.tar.gz | |
RDMA/cxgb3: Don't exceed the max HW CQ depth
The max depth supported by T3 is 64K entries. This fixes a bug
introduced in commit 9918b28d ("RDMA/cxgb3: Increase the max CQ
depth") that causes stalls and possibly crashes in large MPI clusters.
Signed-off-by: Steve Wise <swise@opengridcomputing.com>
Cc: <stable@kernel.org>
Signed-off-by: Roland Dreier <rolandd@cisco.com>
| -rw-r--r-- | drivers/infiniband/hw/cxgb3/cxio_hal.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/infiniband/hw/cxgb3/cxio_hal.h b/drivers/infiniband/hw/cxgb3/cxio_hal.h index 8f0caf7..78fbe9f 100644 --- a/drivers/infiniband/hw/cxgb3/cxio_hal.h +++ b/drivers/infiniband/hw/cxgb3/cxio_hal.h @@ -53,7 +53,7 @@ #define T3_MAX_PBL_SIZE 256 #define T3_MAX_RQ_SIZE 1024 #define T3_MAX_QP_DEPTH (T3_MAX_RQ_SIZE-1) -#define T3_MAX_CQ_DEPTH 262144 +#define T3_MAX_CQ_DEPTH 65536 #define T3_MAX_NUM_STAG (1<<15) #define T3_MAX_MR_SIZE 0x100000000ULL #define T3_PAGESIZE_MASK 0xffff000 /* 4KB-128MB */ |
