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authorDivy Le Ray <divy@chelsio.com>2009-07-07 19:48:38 +0000
committerDavid S. Miller <davem@davemloft.net>2009-07-08 10:54:22 -0700
commitcfe2462c6af309ee70e4aeefa55cae976071b9e2 (patch)
treee6c67157fa4ed3ed0a49edf6732c7cbed48b17fe
parent619f05cf690149bef1f15cd0cec6a31b40d96951 (diff)
downloadop-kernel-dev-cfe2462c6af309ee70e4aeefa55cae976071b9e2.zip
op-kernel-dev-cfe2462c6af309ee70e4aeefa55cae976071b9e2.tar.gz
cxgb3: Fix T3C MAC max packet size access
Max packet size is not the only field in T3C's High Water Mark register. Mask the register to access this field. Signed-off-by: Divy Le Ray <divy@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r--drivers/net/cxgb3/xgmac.c11
1 files changed, 6 insertions, 5 deletions
diff --git a/drivers/net/cxgb3/xgmac.c b/drivers/net/cxgb3/xgmac.c
index f87f943..0109ee4 100644
--- a/drivers/net/cxgb3/xgmac.c
+++ b/drivers/net/cxgb3/xgmac.c
@@ -447,11 +447,12 @@ int t3_mac_set_speed_duplex_fc(struct cmac *mac, int speed, int duplex, int fc)
val = t3_read_reg(adap, A_XGM_RXFIFO_CFG + oft);
val &= ~V_RXFIFOPAUSEHWM(M_RXFIFOPAUSEHWM);
- if (fc & PAUSE_TX)
- val |= V_RXFIFOPAUSEHWM(rx_fifo_hwm(
- t3_read_reg(adap,
- A_XGM_RX_MAX_PKT_SIZE
- + oft)) / 8);
+ if (fc & PAUSE_TX) {
+ u32 rx_max_pkt_size =
+ G_RXMAXPKTSIZE(t3_read_reg(adap,
+ A_XGM_RX_MAX_PKT_SIZE + oft));
+ val |= V_RXFIFOPAUSEHWM(rx_fifo_hwm(rx_max_pkt_size) / 8);
+ }
t3_write_reg(adap, A_XGM_RXFIFO_CFG + oft, val);
t3_set_reg_field(adap, A_XGM_TX_CFG + oft, F_TXPAUSEEN,
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