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author | Arnd Bergmann <arnd@arndb.de> | 2014-11-24 22:01:24 +0100 |
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committer | Arnd Bergmann <arnd@arndb.de> | 2014-11-24 22:06:22 +0100 |
commit | 3fd0c05da46c4dc23b71f2387b611a64f6772283 (patch) | |
tree | ee0ee194aeb5d4ee05de75cfaa25609835ec8b4f | |
parent | 2f28e337651173680c6f045c3d598eaf17b764bb (diff) | |
download | op-kernel-dev-3fd0c05da46c4dc23b71f2387b611a64f6772283.zip op-kernel-dev-3fd0c05da46c4dc23b71f2387b611a64f6772283.tar.gz |
Revert "ARM: dts: sunxi: Use sun4i-a10-apb1-clk for sun6i/sun8i apb2 clocks."
This reverts commit 338302ae32b7be73da97b746f660b283642cfc5c.
This is one of two commits that resulted in a boot regression.
Conflicts:
arch/arm/boot/dts/sun6i-a31.dtsi
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Link: http://lkml.kernel.org/r/7h1toxr0ku.fsf@deeprootsystems.com
-rw-r--r-- | arch/arm/boot/dts/sun6i-a31.dtsi | 12 | ||||
-rw-r--r-- | arch/arm/boot/dts/sun8i-a23.dtsi | 12 |
2 files changed, 20 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi index f1519a8..529c738 100644 --- a/arch/arm/boot/dts/sun6i-a31.dtsi +++ b/arch/arm/boot/dts/sun6i-a31.dtsi @@ -217,11 +217,19 @@ "apb1_daudio1"; }; - apb2: clk@01c20058 { + apb2_mux: apb2_mux@01c20058 { #clock-cells = <0>; - compatible = "allwinner,sun4i-a10-apb1-clk"; + compatible = "allwinner,sun4i-a10-apb1-mux-clk"; reg = <0x01c20058 0x4>; clocks = <&osc32k>, <&osc24M>, <&pll6 0>, <&pll6 0>; + clock-output-names = "apb2_mux"; + }; + + apb2: apb2@01c20058 { + #clock-cells = <0>; + compatible = "allwinner,sun6i-a31-apb2-div-clk"; + reg = <0x01c20058 0x4>; + clocks = <&apb2_mux>; clock-output-names = "apb2"; }; diff --git a/arch/arm/boot/dts/sun8i-a23.dtsi b/arch/arm/boot/dts/sun8i-a23.dtsi index 0746cd1..6086adb 100644 --- a/arch/arm/boot/dts/sun8i-a23.dtsi +++ b/arch/arm/boot/dts/sun8i-a23.dtsi @@ -189,11 +189,19 @@ "apb1_daudio0", "apb1_daudio1"; }; - apb2: clk@01c20058 { + apb2_mux: apb2_mux_clk@01c20058 { #clock-cells = <0>; - compatible = "allwinner,sun4i-a10-apb1-clk"; + compatible = "allwinner,sun4i-a10-apb1-mux-clk"; reg = <0x01c20058 0x4>; clocks = <&osc32k>, <&osc24M>, <&pll6>, <&pll6>; + clock-output-names = "apb2_mux"; + }; + + apb2: apb2_clk@01c20058 { + #clock-cells = <0>; + compatible = "allwinner,sun6i-a31-apb2-div-clk"; + reg = <0x01c20058 0x4>; + clocks = <&apb2_mux>; clock-output-names = "apb2"; }; |