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author | Arnd Bergmann <arnd@arndb.de> | 2014-11-20 13:45:22 +0100 |
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committer | Arnd Bergmann <arnd@arndb.de> | 2014-11-20 13:45:22 +0100 |
commit | 3af1fda393e08f2e6e095d6e89299b30b35677fe (patch) | |
tree | d25bb2494fef29638315d8fa0e42d8b6dfbfbfaf | |
parent | 9e64b2a421db0f825ae2c07ed004c785303dc70e (diff) | |
parent | 256e7653c8bac60f1ccf9e0a58cc45b01a7954b9 (diff) | |
download | op-kernel-dev-3af1fda393e08f2e6e095d6e89299b30b35677fe.zip op-kernel-dev-3af1fda393e08f2e6e095d6e89299b30b35677fe.tar.gz |
Merge tag 'v3.19-next-dts' of https://github.com/mbgg/linux-mediatek into next/dt
Pull "Add support for mt6592, mt8127 and mt8135 Socs from Mediatek"
from Matthias Brugger:
Here comes the pull request which introduces basic support for
Mediatek SoCs mt6592, mt8127 and mt8135.
The patches for the mt81xx got merged in the late tree for v3.18 but
were not be merged at the end. They got a small fix regarding the
compatible and model string in the dts files.
* tag 'v3.19-next-dts' of https://github.com/mbgg/linux-mediatek:
dt-bindings: add documentation for Mediatek SoC
ARM: mediatek: add dts for mt6592-evb
ARM: mediatek: Add basic support for mt6592
dt-bindings: add more chips in documentation for Mediatek SoC
ARM: dts: Build dtb for mt8127 & mt8135
ARM: mediatek: add dts for MT8135 evaluation board.
ARM: mediatek: Add basic support for mt8135
ARM: mediatek: add dts for 8127 Moose board
ARM: mediatek: Add basic support for mt8127
Signed-off-by; Arnd Bergmann <arnd@arndb.de>
-rw-r--r-- | Documentation/devicetree/bindings/arm/mediatek.txt | 19 | ||||
-rw-r--r-- | arch/arm/boot/dts/Makefile | 5 | ||||
-rw-r--r-- | arch/arm/boot/dts/mt6592-evb.dts | 26 | ||||
-rw-r--r-- | arch/arm/boot/dts/mt6592.dtsi | 98 | ||||
-rw-r--r-- | arch/arm/boot/dts/mt8127-moose.dts | 25 | ||||
-rw-r--r-- | arch/arm/boot/dts/mt8127.dtsi | 94 | ||||
-rw-r--r-- | arch/arm/boot/dts/mt8135-evbp1.dts | 25 | ||||
-rw-r--r-- | arch/arm/boot/dts/mt8135.dtsi | 116 | ||||
-rw-r--r-- | arch/arm/mach-mediatek/mediatek.c | 3 |
9 files changed, 407 insertions, 4 deletions
diff --git a/Documentation/devicetree/bindings/arm/mediatek.txt b/Documentation/devicetree/bindings/arm/mediatek.txt index fa25226..3be4013 100644 --- a/Documentation/devicetree/bindings/arm/mediatek.txt +++ b/Documentation/devicetree/bindings/arm/mediatek.txt @@ -1,10 +1,14 @@ -Mediatek MT6589 Platforms Device Tree Bindings +MediaTek mt65xx & mt81xx Platforms Device Tree Bindings -Boards with a SoC of the Mediatek MT6589 shall have the following property: +Boards with a MediaTek mt65xx/mt81xx SoC shall have the following property: Required root node property: -compatible: must contain "mediatek,mt6589" +compatible: Must contain one of + "mediatek,mt6589" + "mediatek,mt6592" + "mediatek,mt8127" + "mediatek,mt8135" Supported boards: @@ -12,3 +16,12 @@ Supported boards: - bq Aquaris5 smart phone: Required root node properties: - compatible = "mundoreader,bq-aquaris5", "mediatek,mt6589"; +- Evaluation board for MT6592: + Required root node properties: + - compatible = "mediatek,mt6592-evb", "mediatek,mt6592"; +- MTK mt8127 tablet moose EVB: + Required root node properties: + - compatible = "mediatek,mt8127-moose", "mediatek,mt8127"; +- MTK mt8135 tablet EVB: + Required root node properties: + - compatible = "mediatek,mt8135-evbp1", "mediatek,mt8135"; diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index bbce4f4..9bcee71 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -526,7 +526,10 @@ dtb-$(CONFIG_MACH_DOVE) += dove-cm-a510.dtb \ dove-d2plug.dtb \ dove-d3plug.dtb \ dove-dove-db.dtb -dtb-$(CONFIG_ARCH_MEDIATEK) += mt6589-aquaris5.dtb +dtb-$(CONFIG_ARCH_MEDIATEK) += mt6589-aquaris5.dtb \ + mt6592-evb.dtb \ + mt8127-moose.dtb \ + mt8135-evbp1.dtb targets += dtbs dtbs_install targets += $(dtb-y) diff --git a/arch/arm/boot/dts/mt6592-evb.dts b/arch/arm/boot/dts/mt6592-evb.dts new file mode 100644 index 0000000..b57237e --- /dev/null +++ b/arch/arm/boot/dts/mt6592-evb.dts @@ -0,0 +1,26 @@ +/* + * Copyright (c) 2014 MediaTek Inc. + * Author: Howard Chen <ibanezchen@gmail.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/dts-v1/; +#include "mt6592.dtsi" + +/ { + model = "mt6592 evb"; + compatible = "mediatek,mt6592-evb", "mediatek,mt6592"; + + memory { + reg = <0x80000000 0x40000000>; + }; +}; + diff --git a/arch/arm/boot/dts/mt6592.dtsi b/arch/arm/boot/dts/mt6592.dtsi new file mode 100644 index 0000000..31e5a09 --- /dev/null +++ b/arch/arm/boot/dts/mt6592.dtsi @@ -0,0 +1,98 @@ +/* + * Copyright (c) 2014 MediaTek Inc. + * Author: Howard Chen <ibanezchen@gmail.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include "skeleton.dtsi" + +/ { + compatible = "mediatek,mt6592"; + interrupt-parent = <&gic>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x0>; + }; + cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x1>; + }; + cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x2>; + }; + cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x3>; + }; + cpu@4 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x4>; + }; + cpu@5 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x5>; + }; + cpu@6 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x6>; + }; + cpu@7 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x7>; + }; + }; + + system_clk: dummy13m { + compatible = "fixed-clock"; + clock-frequency = <13000000>; + #clock-cells = <0>; + }; + + rtc_clk: dummy32k { + compatible = "fixed-clock"; + clock-frequency = <32000>; + #clock-cells = <0>; + }; + + timer: timer@10008000 { + compatible = "mediatek,mt6577-timer"; + reg = <0x10008000 0x80>; + interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&system_clk>, <&rtc_clk>; + clock-names = "system-clk", "rtc-clk"; + }; + + gic: interrupt-controller@10211000 { + compatible = "arm,cortex-a7-gic"; + interrupt-controller; + #interrupt-cells = <3>; + reg = <0x10211000 0x1000>, + <0x10212000 0x1000>; + }; + +}; + diff --git a/arch/arm/boot/dts/mt8127-moose.dts b/arch/arm/boot/dts/mt8127-moose.dts new file mode 100644 index 0000000..13cba0e --- /dev/null +++ b/arch/arm/boot/dts/mt8127-moose.dts @@ -0,0 +1,25 @@ +/* + * Copyright (c) 2014 MediaTek Inc. + * Author: Joe.C <yingjoe.chen@mediatek.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/dts-v1/; +#include "mt8127.dtsi" + +/ { + model = "MediaTek MT8127 Moose Board"; + compatible = "mediatek,mt8127-moose", "mediatek,mt8127"; + + memory { + reg = <0 0x80000000 0 0x40000000>; + }; +}; diff --git a/arch/arm/boot/dts/mt8127.dtsi b/arch/arm/boot/dts/mt8127.dtsi new file mode 100644 index 0000000..b24c0a2 --- /dev/null +++ b/arch/arm/boot/dts/mt8127.dtsi @@ -0,0 +1,94 @@ +/* + * Copyright (c) 2014 MediaTek Inc. + * Author: Joe.C <yingjoe.chen@mediatek.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include "skeleton64.dtsi" + +/ { + compatible = "mediatek,mt8127"; + interrupt-parent = <&gic>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x0>; + }; + cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x1>; + }; + cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x2>; + }; + cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x3>; + }; + + }; + + clocks { + #address-cells = <2>; + #size-cells = <2>; + compatible = "simple-bus"; + ranges; + + system_clk: dummy13m { + compatible = "fixed-clock"; + clock-frequency = <13000000>; + #clock-cells = <0>; + }; + + rtc_clk: dummy32k { + compatible = "fixed-clock"; + clock-frequency = <32000>; + #clock-cells = <0>; + }; + }; + + soc { + #address-cells = <2>; + #size-cells = <2>; + compatible = "simple-bus"; + ranges; + + timer: timer@10008000 { + compatible = "mediatek,mt8127-timer", + "mediatek,mt6577-timer"; + reg = <0 0x10008000 0 0x80>; + interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&system_clk>, <&rtc_clk>; + clock-names = "system-clk", "rtc-clk"; + }; + + gic: interrupt-controller@10211000 { + compatible = "arm,cortex-a7-gic"; + interrupt-controller; + #interrupt-cells = <3>; + reg = <0 0x10211000 0 0x1000>, + <0 0x10212000 0 0x1000>, + <0 0x10214000 0 0x2000>, + <0 0x10216000 0 0x2000>; + }; + }; +}; diff --git a/arch/arm/boot/dts/mt8135-evbp1.dts b/arch/arm/boot/dts/mt8135-evbp1.dts new file mode 100644 index 0000000..a5adf97 --- /dev/null +++ b/arch/arm/boot/dts/mt8135-evbp1.dts @@ -0,0 +1,25 @@ +/* + * Copyright (c) 2014 MediaTek Inc. + * Author: Joe.C <yingjoe.chen@mediatek.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/dts-v1/; +#include "mt8135.dtsi" + +/ { + model = "MediaTek MT8135 evaluation board"; + compatible = "mediatek,mt8135-evbp1", "mediatek,mt8135"; + + memory { + reg = <0 0x80000000 0 0x40000000>; + }; +}; diff --git a/arch/arm/boot/dts/mt8135.dtsi b/arch/arm/boot/dts/mt8135.dtsi new file mode 100644 index 0000000..7d56a98 --- /dev/null +++ b/arch/arm/boot/dts/mt8135.dtsi @@ -0,0 +1,116 @@ +/* + * Copyright (c) 2014 MediaTek Inc. + * Author: Joe.C <yingjoe.chen@mediatek.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include "skeleton64.dtsi" + +/ { + compatible = "mediatek,mt8135"; + interrupt-parent = <&gic>; + + cpu-map { + cluster0 { + core0 { + cpu = <&cpu0>; + }; + core1 { + cpu = <&cpu1>; + }; + }; + + cluster1 { + core0 { + cpu = <&cpu2>; + }; + core1 { + cpu = <&cpu3>; + }; + }; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x000>; + }; + + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a7"; + reg = <0x001>; + }; + + cpu2: cpu@100 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <0x100>; + }; + + cpu3: cpu@101 { + device_type = "cpu"; + compatible = "arm,cortex-a15"; + reg = <0x101>; + }; + }; + + clocks { + #address-cells = <2>; + #size-cells = <2>; + compatible = "simple-bus"; + ranges; + + system_clk: dummy13m { + compatible = "fixed-clock"; + clock-frequency = <13000000>; + #clock-cells = <0>; + }; + + rtc_clk: dummy32k { + compatible = "fixed-clock"; + clock-frequency = <32000>; + #clock-cells = <0>; + }; + }; + + soc { + #address-cells = <2>; + #size-cells = <2>; + compatible = "simple-bus"; + ranges; + + timer: timer@10008000 { + compatible = "mediatek,mt8135-timer", + "mediatek,mt6577-timer"; + reg = <0 0x10008000 0 0x80>; + interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&system_clk>, <&rtc_clk>; + clock-names = "system-clk", "rtc-clk"; + }; + + gic: interrupt-controller@10211000 { + compatible = "arm,cortex-a15-gic"; + interrupt-controller; + #interrupt-cells = <3>; + reg = <0 0x10211000 0 0x1000>, + <0 0x10212000 0 0x1000>, + <0 0x10214000 0 0x2000>, + <0 0x10216000 0 0x2000>; + }; + }; +}; diff --git a/arch/arm/mach-mediatek/mediatek.c b/arch/arm/mach-mediatek/mediatek.c index f2acf07..a954900 100644 --- a/arch/arm/mach-mediatek/mediatek.c +++ b/arch/arm/mach-mediatek/mediatek.c @@ -19,6 +19,9 @@ static const char * const mediatek_board_dt_compat[] = { "mediatek,mt6589", + "mediatek,mt6592", + "mediatek,mt8127", + "mediatek,mt8135", NULL, }; |