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author | Ben Widawsky <benjamin.widawsky@intel.com> | 2014-03-19 18:31:10 -0700 |
---|---|---|
committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-03-20 14:45:29 +0100 |
commit | 1f05c944e007809d7040a1cc87b16934fedd23f6 (patch) | |
tree | d54c2c223287682cb739d0fb3381c23987c8b80b | |
parent | 5a953add43ea62e862ba15b7f969cd838e456949 (diff) | |
download | op-kernel-dev-1f05c944e007809d7040a1cc87b16934fedd23f6.zip op-kernel-dev-1f05c944e007809d7040a1cc87b16934fedd23f6.tar.gz |
drm/i915: Store the HW min frequency as min_freq
this leaves a temporarily awkward min_delay (the soft limit) with the
new min_freq (the hardware limit). It's fixed in the next patch.
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-rw-r--r-- | drivers/gpu/drm/i915/i915_drv.h | 1 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 2 |
2 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 9cd870f..241f5e1 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -987,6 +987,7 @@ struct intel_gen6_power_mgmt { u8 rp1_delay; u8 rp0_delay; u8 hw_max; + u8 min_freq; bool rp_up_masked; bool rp_down_masked; diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index dd3a121..dd631d1 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -3354,7 +3354,7 @@ static void gen6_enable_rps(struct drm_device *dev) /* In units of 50MHz */ dev_priv->rps.hw_max = hw_max = rp_state_cap & 0xff; - hw_min = (rp_state_cap >> 16) & 0xff; + dev_priv->rps.min_freq = hw_min = (rp_state_cap >> 16) & 0xff; dev_priv->rps.rp1_delay = (rp_state_cap >> 8) & 0xff; dev_priv->rps.rp0_delay = (rp_state_cap >> 0) & 0xff; dev_priv->rps.rpe_delay = dev_priv->rps.rp1_delay; |