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| author | Damien Lespiau <damien.lespiau@intel.com> | 2015-02-03 14:25:14 +0000 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2015-02-13 23:28:30 +0100 |
| commit | 2db59d530777b76f6b7944e0bfa43c9fede10b10 (patch) | |
| tree | 95cb24dcc2eaf95058dde5dc2d685b86216ca008 | |
| parent | 72603ec0e2db745978a8f126307fe857f9a1ddc9 (diff) | |
| download | op-kernel-dev-2db59d530777b76f6b7944e0bfa43c9fede10b10.zip op-kernel-dev-2db59d530777b76f6b7944e0bfa43c9fede10b10.tar.gz | |
drm/i915: Detect eDRAM with the enabled bit only
At the moment we compare the whole EDRAM_PRESENT/EDRAMCAP register value
to 1 while EDRAM_PRESENT is only bit 0 (the rest may be used to describe
eDRAM capabilities).
To be more future proof, only look at bit 0 to detect eDRAM presence.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 1 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/intel_uncore.c | 2 |
2 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index f13e4e4f..5de6cf4 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -5994,6 +5994,7 @@ enum skl_disp_power_wells { #define HSW_IDICR 0x9008 #define IDIHASHMSK(x) (((x) & 0x3f) << 16) #define HSW_EDRAM_PRESENT 0x120010 +#define EDRAM_ENABLED 0x1 #define GEN6_UCGCTL1 0x9400 # define GEN6_EU_TCUNIT_CLOCK_GATE_DISABLE (1 << 16) diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c index db864df..820a208 100644 --- a/drivers/gpu/drm/i915/intel_uncore.c +++ b/drivers/gpu/drm/i915/intel_uncore.c @@ -329,7 +329,7 @@ static void intel_uncore_ellc_detect(struct drm_device *dev) struct drm_i915_private *dev_priv = dev->dev_private; if ((IS_HASWELL(dev) || IS_BROADWELL(dev)) && - (__raw_i915_read32(dev_priv, HSW_EDRAM_PRESENT) == 1)) { + (__raw_i915_read32(dev_priv, HSW_EDRAM_PRESENT) & EDRAM_ENABLED)) { /* The docs do not explain exactly how the calculation can be * made. It is somewhat guessable, but for now, it's always * 128MB. |
