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author | Alex Deucher <alexander.deucher@amd.com> | 2014-10-13 12:44:49 -0400 |
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committer | Alex Deucher <alexander.deucher@amd.com> | 2014-10-28 10:44:33 -0400 |
commit | 6fa455935ab956248b165f150ec6ae9106210077 (patch) | |
tree | 2c53db7c6b2d17184154ce751b549cde230d1f47 | |
parent | 30aad89ad0697028b9aa0867b3e95cc0ccca064d (diff) | |
download | op-kernel-dev-6fa455935ab956248b165f150ec6ae9106210077.zip op-kernel-dev-6fa455935ab956248b165f150ec6ae9106210077.tar.gz |
drm/radeon/dpm: disable ulv support on SI
Causes problems on some boards.
bug:
https://bugs.freedesktop.org/show_bug.cgi?id=82889
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
-rw-r--r-- | drivers/gpu/drm/radeon/si_dpm.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/radeon/si_dpm.c b/drivers/gpu/drm/radeon/si_dpm.c index a53c2e7..676e6c2 100644 --- a/drivers/gpu/drm/radeon/si_dpm.c +++ b/drivers/gpu/drm/radeon/si_dpm.c @@ -6256,7 +6256,7 @@ static void si_parse_pplib_clock_info(struct radeon_device *rdev, if ((rps->class2 & ATOM_PPLIB_CLASSIFICATION2_ULV) && index == 0) { /* XXX disable for A0 tahiti */ - si_pi->ulv.supported = true; + si_pi->ulv.supported = false; si_pi->ulv.pl = *pl; si_pi->ulv.one_pcie_lane_in_ulv = false; si_pi->ulv.volt_change_delay = SISLANDS_ULVVOLTAGECHANGEDELAY_DFLT; |