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authorPeter De Schrijver <pdeschrijver@nvidia.com>2013-02-04 15:40:30 +0200
committerStephen Warren <swarren@nvidia.com>2013-03-11 14:29:43 -0600
commit6f88fb8af6c67f281b8e2cd607f08e0089c8ccbe (patch)
tree8d945e2d594c9334616b612bacbd380a89ed5400
parent1b14f3a57b0a1a9e0ca7091ca9f8c14fe23dfd70 (diff)
downloadop-kernel-dev-6f88fb8af6c67f281b8e2cd607f08e0089c8ccbe.zip
op-kernel-dev-6f88fb8af6c67f281b8e2cd607f08e0089c8ccbe.tar.gz
clocksource: tegra: move to of_clk_get
The new clockframework introduced DT IDs for each clock. To be able to remove the device registrations, this driver needs to be updated to use the DT IDs. Note that the actual removal of the clk_register_clkdev() calls will be done in a later series. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
-rw-r--r--arch/arm/boot/dts/tegra20.dtsi2
-rw-r--r--arch/arm/boot/dts/tegra30.dtsi2
-rw-r--r--drivers/clocksource/tegra20_timer.c4
3 files changed, 6 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index 9a42893..37701d8 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -144,6 +144,7 @@
0 1 0x04
0 41 0x04
0 42 0x04>;
+ clocks = <&tegra_car 5>;
};
tegra_car: clock {
@@ -303,6 +304,7 @@
compatible = "nvidia,tegra20-rtc";
reg = <0x7000e000 0x100>;
interrupts = <0 2 0x04>;
+ clocks = <&tegra_car 4>;
};
i2c@7000c000 {
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index 767803e..7effa93 100644
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -147,6 +147,7 @@
0 42 0x04
0 121 0x04
0 122 0x04>;
+ clocks = <&tegra_car 5>;
};
tegra_car: clock {
@@ -290,6 +291,7 @@
compatible = "nvidia,tegra30-rtc", "nvidia,tegra20-rtc";
reg = <0x7000e000 0x100>;
interrupts = <0 2 0x04>;
+ clocks = <&tegra_car 4>;
};
i2c@7000c000 {
diff --git a/drivers/clocksource/tegra20_timer.c b/drivers/clocksource/tegra20_timer.c
index 0bde03f..bc4b8ad 100644
--- a/drivers/clocksource/tegra20_timer.c
+++ b/drivers/clocksource/tegra20_timer.c
@@ -189,7 +189,7 @@ static void __init tegra20_init_timer(void)
BUG();
}
- clk = clk_get_sys("timer", NULL);
+ clk = of_clk_get(np, 0);
if (IS_ERR(clk)) {
pr_warn("Unable to get timer clock. Assuming 12Mhz input clock.\n");
rate = 12000000;
@@ -216,7 +216,7 @@ static void __init tegra20_init_timer(void)
* rtc registers are used by read_persistent_clock, keep the rtc clock
* enabled
*/
- clk = clk_get_sys("rtc-tegra", NULL);
+ clk = of_clk_get(np, 0);
if (IS_ERR(clk))
pr_warn("Unable to get rtc-tegra clock\n");
else
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