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authorBhuvanchandra DV <bhuvanchandra.dv@toradex.com>2016-03-22 01:41:52 +0530
committerMark Brown <broonie@kernel.org>2016-03-23 13:54:42 +0000
commit9419b2006cf47c75985ea51d36ddc51346d29efd (patch)
tree5b30ca52f3bbc670d7d598d8c02df48a658ed8ca
parentc508709bcffb644afbf5e5016fc7c90bf80c30ff (diff)
downloadop-kernel-dev-9419b2006cf47c75985ea51d36ddc51346d29efd.zip
op-kernel-dev-9419b2006cf47c75985ea51d36ddc51346d29efd.tar.gz
spi: fsl-dspi: Set max_speed_hz for master
Calculate and update max speed from bus clock for SoCs using DSPI IP. The bus clock factor's are taken from the data sheets of respective SoCs. Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Acked-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Mark Brown <broonie@kernel.org>
-rw-r--r--drivers/spi/spi-fsl-dspi.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/spi/spi-fsl-dspi.c b/drivers/spi/spi-fsl-dspi.c
index 39412c9..559ed70 100644
--- a/drivers/spi/spi-fsl-dspi.c
+++ b/drivers/spi/spi-fsl-dspi.c
@@ -121,18 +121,22 @@ enum dspi_trans_mode {
struct fsl_dspi_devtype_data {
enum dspi_trans_mode trans_mode;
+ u8 max_clock_factor;
};
static const struct fsl_dspi_devtype_data vf610_data = {
.trans_mode = DSPI_EOQ_MODE,
+ .max_clock_factor = 2,
};
static const struct fsl_dspi_devtype_data ls1021a_v1_data = {
.trans_mode = DSPI_TCFQ_MODE,
+ .max_clock_factor = 8,
};
static const struct fsl_dspi_devtype_data ls2085a_data = {
.trans_mode = DSPI_TCFQ_MODE,
+ .max_clock_factor = 8,
};
struct fsl_dspi {
@@ -726,6 +730,9 @@ static int dspi_probe(struct platform_device *pdev)
}
clk_prepare_enable(dspi->clk);
+ master->max_speed_hz =
+ clk_get_rate(dspi->clk) / dspi->devtype_data->max_clock_factor;
+
init_waitqueue_head(&dspi->waitq);
platform_set_drvdata(pdev, master);
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