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| author | Stephen Warren <swarren@nvidia.com> | 2013-12-03 16:44:35 -0700 |
|---|---|---|
| committer | Stephen Warren <swarren@nvidia.com> | 2013-12-16 14:09:18 -0700 |
| commit | 9d5b25050715ce052bc69ebafb840351bd255932 (patch) | |
| tree | b788fe9ccf1535a7abb0c399b305582c15ed0a6f | |
| parent | 4f6074601a4dfaa628c4fa8f284f2841df41f0fe (diff) | |
| download | op-kernel-dev-9d5b25050715ce052bc69ebafb840351bd255932.zip op-kernel-dev-9d5b25050715ce052bc69ebafb840351bd255932.tar.gz | |
ARM: tegra: enable I2C controllers on Venice2
Enable all the I2C controllers that are wired up on Venice2. I don't
know the correct I2C bus clock rates, so set them all to a conservative
100KHz for now.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
| -rw-r--r-- | arch/arm/boot/dts/tegra124-venice2.dts | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/tegra124-venice2.dts b/arch/arm/boot/dts/tegra124-venice2.dts index f765c82..3d6ba4b 100644 --- a/arch/arm/boot/dts/tegra124-venice2.dts +++ b/arch/arm/boot/dts/tegra124-venice2.dts @@ -14,6 +14,31 @@ status = "okay"; }; + i2c@7000c000 { + status = "okay"; + clock-frequency = <100000>; + }; + + i2c@7000c400 { + status = "okay"; + clock-frequency = <100000>; + }; + + i2c@7000c500 { + status = "okay"; + clock-frequency = <100000>; + }; + + i2c@7000c700 { + status = "okay"; + clock-frequency = <100000>; + }; + + i2c@7000d000 { + status = "okay"; + clock-frequency = <100000>; + }; + pmc@7000e400 { nvidia,invert-interrupt; nvidia,suspend-mode = <1>; |
