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| author | Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> | 2012-11-16 15:24:06 +0000 |
|---|---|---|
| committer | Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> | 2012-11-19 15:44:33 +0000 |
| commit | 71db5bfec1349afcbfbd71268c01c658c357b4f3 (patch) | |
| tree | 5da0b010a0bdf13921ee5f92b846b095b12f1154 | |
| parent | dca463daa0151c5bbbd8ec8fd42882a3966d3c44 (diff) | |
| download | op-kernel-dev-71db5bfec1349afcbfbd71268c01c658c357b4f3.zip op-kernel-dev-71db5bfec1349afcbfbd71268c01c658c357b4f3.tar.gz | |
ARM: kernel: update topology to use new MPIDR macros
This patch updates the topology initialization code to use the newly
defined accessors to retrieve the MPIDR affinity levels.
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
| -rw-r--r-- | arch/arm/kernel/topology.c | 15 |
1 files changed, 5 insertions, 10 deletions
diff --git a/arch/arm/kernel/topology.c b/arch/arm/kernel/topology.c index cd68d1a..79282eb 100644 --- a/arch/arm/kernel/topology.c +++ b/arch/arm/kernel/topology.c @@ -257,19 +257,14 @@ void store_cpu_topology(unsigned int cpuid) if (mpidr & MPIDR_MT_BITMASK) { /* core performance interdependency */ - cpuid_topo->thread_id = (mpidr >> MPIDR_LEVEL0_SHIFT) - & MPIDR_LEVEL0_MASK; - cpuid_topo->core_id = (mpidr >> MPIDR_LEVEL1_SHIFT) - & MPIDR_LEVEL1_MASK; - cpuid_topo->socket_id = (mpidr >> MPIDR_LEVEL2_SHIFT) - & MPIDR_LEVEL2_MASK; + cpuid_topo->thread_id = MPIDR_AFFINITY_LEVEL(mpidr, 0); + cpuid_topo->core_id = MPIDR_AFFINITY_LEVEL(mpidr, 1); + cpuid_topo->socket_id = MPIDR_AFFINITY_LEVEL(mpidr, 2); } else { /* largely independent cores */ cpuid_topo->thread_id = -1; - cpuid_topo->core_id = (mpidr >> MPIDR_LEVEL0_SHIFT) - & MPIDR_LEVEL0_MASK; - cpuid_topo->socket_id = (mpidr >> MPIDR_LEVEL1_SHIFT) - & MPIDR_LEVEL1_MASK; + cpuid_topo->core_id = MPIDR_AFFINITY_LEVEL(mpidr, 0); + cpuid_topo->socket_id = MPIDR_AFFINITY_LEVEL(mpidr, 1); } } else { /* |
