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authorPavel Pisa <ppisa@pikron.com>2007-03-08 00:00:40 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2007-03-12 16:49:37 +0000
commit2cb3320b3fb788eb95afbfea8686f11bb14e30b0 (patch)
treeb0f737af20fa8cb6cbc3ba3309eb45da86b4d338
parentb3c6b76ffb1a8c8d1f12e838a25c1a86f5316e2c (diff)
downloadop-kernel-dev-2cb3320b3fb788eb95afbfea8686f11bb14e30b0.zip
op-kernel-dev-2cb3320b3fb788eb95afbfea8686f11bb14e30b0.tar.gz
[ARM] 4256/1: i.MX/MX1 SDHC fix/workaround of SD card recognition problems
The SDHC controllers cannot process shorter transfers. They has to be handled as longer ones, but it such case CRC error is evaluated. There was a case in the code still, where this error is not ignored as it should to be process these transfers. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-rw-r--r--drivers/mmc/imxmmc.c13
1 files changed, 12 insertions, 1 deletions
diff --git a/drivers/mmc/imxmmc.c b/drivers/mmc/imxmmc.c
index b060d4b..0de5c9e 100644
--- a/drivers/mmc/imxmmc.c
+++ b/drivers/mmc/imxmmc.c
@@ -569,10 +569,12 @@ static int imxmci_cpu_driven_data(struct imxmci_host *host, unsigned int *pstat)
if(host->dma_dir == DMA_FROM_DEVICE) {
imxmci_busy_wait_for_status(host, &stat,
- STATUS_APPL_BUFF_FF | STATUS_DATA_TRANS_DONE,
+ STATUS_APPL_BUFF_FF | STATUS_DATA_TRANS_DONE |
+ STATUS_TIME_OUT_READ,
50, "imxmci_cpu_driven_data read");
while((stat & (STATUS_APPL_BUFF_FF | STATUS_DATA_TRANS_DONE)) &&
+ !(stat & STATUS_TIME_OUT_READ) &&
(host->data_cnt < 512)) {
udelay(20); /* required for clocks < 8MHz*/
@@ -602,6 +604,12 @@ static int imxmci_cpu_driven_data(struct imxmci_host *host, unsigned int *pstat)
if(host->dma_size & 0x1ff)
stat &= ~STATUS_CRC_READ_ERR;
+ if(stat & STATUS_TIME_OUT_READ) {
+ dev_dbg(mmc_dev(host->mmc), "imxmci_cpu_driven_data read timeout STATUS = 0x%x\n",
+ stat);
+ trans_done = -1;
+ }
+
} else {
imxmci_busy_wait_for_status(host, &stat,
STATUS_APPL_BUFF_FE,
@@ -709,6 +717,9 @@ static void imxmci_tasklet_fnc(unsigned long data)
*/
stat |= host->status_reg;
+ if(test_bit(IMXMCI_PEND_CPU_DATA_b, &host->pending_events))
+ stat &= ~STATUS_CRC_READ_ERR;
+
if(test_bit(IMXMCI_PEND_WAIT_RESP_b, &host->pending_events)) {
imxmci_busy_wait_for_status(host, &stat,
STATUS_END_CMD_RESP | STATUS_ERR_MASK,
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