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authorFabrice Gasnier <fabrice.gasnier@st.com>2017-05-29 11:28:17 +0200
committerJonathan Cameron <jic23@kernel.org>2017-06-11 15:07:24 +0100
commit9fd243c4fb872381830a9c0ceb5d65a47c0d0e0f (patch)
treed41d06fd09ca80755f56886139261a0585731e7d
parentaaf0ceb3c0686ea6057a4f834adb446b09e52bd3 (diff)
downloadop-kernel-dev-9fd243c4fb872381830a9c0ceb5d65a47c0d0e0f.zip
op-kernel-dev-9fd243c4fb872381830a9c0ceb5d65a47c0d0e0f.tar.gz
iio: adc: stm32: make core adc clock optional by default
Analog clock input is mandatory on stm32f4. But newer version of ADC hardware block allow to select either bus clock or asynchronous clock, for analog circuitry. So, make it optional by default, but enforce clk presence on stm32f4. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
-rw-r--r--drivers/iio/adc/stm32-adc-core.c38
1 files changed, 26 insertions, 12 deletions
diff --git a/drivers/iio/adc/stm32-adc-core.c b/drivers/iio/adc/stm32-adc-core.c
index 22b7c93..597ab7a 100644
--- a/drivers/iio/adc/stm32-adc-core.c
+++ b/drivers/iio/adc/stm32-adc-core.c
@@ -85,13 +85,21 @@ static int stm32f4_adc_clk_sel(struct platform_device *pdev,
u32 val;
int i;
+ /* stm32f4 has one clk input for analog (mandatory), enforce it here */
+ if (!priv->aclk) {
+ dev_err(&pdev->dev, "No 'adc' clock found\n");
+ return -ENOENT;
+ }
+
rate = clk_get_rate(priv->aclk);
for (i = 0; i < ARRAY_SIZE(stm32f4_pclk_div); i++) {
if ((rate / stm32f4_pclk_div[i]) <= STM32F4_ADC_MAX_CLK_RATE)
break;
}
- if (i >= ARRAY_SIZE(stm32f4_pclk_div))
+ if (i >= ARRAY_SIZE(stm32f4_pclk_div)) {
+ dev_err(&pdev->dev, "adc clk selection failed\n");
return -EINVAL;
+ }
val = readl_relaxed(priv->common.base + STM32F4_ADC_CCR);
val &= ~STM32F4_ADC_ADCPRE_MASK;
@@ -227,21 +235,25 @@ static int stm32_adc_probe(struct platform_device *pdev)
priv->aclk = devm_clk_get(&pdev->dev, "adc");
if (IS_ERR(priv->aclk)) {
ret = PTR_ERR(priv->aclk);
- dev_err(&pdev->dev, "Can't get 'adc' clock\n");
- goto err_regulator_disable;
+ if (ret == -ENOENT) {
+ priv->aclk = NULL;
+ } else {
+ dev_err(&pdev->dev, "Can't get 'adc' clock\n");
+ goto err_regulator_disable;
+ }
}
- ret = clk_prepare_enable(priv->aclk);
- if (ret < 0) {
- dev_err(&pdev->dev, "adc clk enable failed\n");
- goto err_regulator_disable;
+ if (priv->aclk) {
+ ret = clk_prepare_enable(priv->aclk);
+ if (ret < 0) {
+ dev_err(&pdev->dev, "adc clk enable failed\n");
+ goto err_regulator_disable;
+ }
}
ret = stm32f4_adc_clk_sel(pdev, priv);
- if (ret < 0) {
- dev_err(&pdev->dev, "adc clk selection failed\n");
+ if (ret < 0)
goto err_clk_disable;
- }
ret = stm32_adc_irq_probe(pdev, priv);
if (ret < 0)
@@ -261,7 +273,8 @@ err_irq_remove:
stm32_adc_irq_remove(pdev, priv);
err_clk_disable:
- clk_disable_unprepare(priv->aclk);
+ if (priv->aclk)
+ clk_disable_unprepare(priv->aclk);
err_regulator_disable:
regulator_disable(priv->vref);
@@ -276,7 +289,8 @@ static int stm32_adc_remove(struct platform_device *pdev)
of_platform_depopulate(&pdev->dev);
stm32_adc_irq_remove(pdev, priv);
- clk_disable_unprepare(priv->aclk);
+ if (priv->aclk)
+ clk_disable_unprepare(priv->aclk);
regulator_disable(priv->vref);
return 0;
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