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| author | Dan Williams <dan.j.williams@intel.com> | 2010-05-01 15:22:56 -0700 |
|---|---|---|
| committer | Dan Williams <dan.j.williams@intel.com> | 2010-05-01 15:22:56 -0700 |
| commit | 2adfc550b6d9646301c810643bc309fa49375987 (patch) | |
| tree | 1e1fe80772dc588be2dc294d8b9f371caec3f0b0 | |
| parent | 074cc47679f8b0931d7d5384e95822d82768f149 (diff) | |
| download | op-kernel-dev-2adfc550b6d9646301c810643bc309fa49375987.zip op-kernel-dev-2adfc550b6d9646301c810643bc309fa49375987.tar.gz | |
ioat3: disable cacheline-unaligned transfers for raid operations
There are cases where cacheline-unaligned raid operations can hang the
dma channel. Simply disable these operations by increasing the
alignment constraints published to async_tx. The raid456 driver always
issues page aligned requests, so the only in-kernel user of the ioatdma
driver that is affected by this change is dmatest.
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| -rw-r--r-- | drivers/dma/ioat/dma_v3.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/dma/ioat/dma_v3.c b/drivers/dma/ioat/dma_v3.c index 8b573fa..e2a2395 100644 --- a/drivers/dma/ioat/dma_v3.c +++ b/drivers/dma/ioat/dma_v3.c @@ -1175,7 +1175,7 @@ int __devinit ioat3_dma_probe(struct ioatdma_device *device, int dca) if (cap & IOAT_CAP_XOR) { is_raid_device = true; dma->max_xor = 8; - dma->xor_align = 2; + dma->xor_align = 6; dma_cap_set(DMA_XOR, dma->cap_mask); dma->device_prep_dma_xor = ioat3_prep_xor; @@ -1186,7 +1186,7 @@ int __devinit ioat3_dma_probe(struct ioatdma_device *device, int dca) if (cap & IOAT_CAP_PQ) { is_raid_device = true; dma_set_maxpq(dma, 8, 0); - dma->pq_align = 2; + dma->pq_align = 6; dma_cap_set(DMA_PQ, dma->cap_mask); dma->device_prep_dma_pq = ioat3_prep_pq; @@ -1196,7 +1196,7 @@ int __devinit ioat3_dma_probe(struct ioatdma_device *device, int dca) if (!(cap & IOAT_CAP_XOR)) { dma->max_xor = 8; - dma->xor_align = 2; + dma->xor_align = 6; dma_cap_set(DMA_XOR, dma->cap_mask); dma->device_prep_dma_xor = ioat3_prep_pqxor; |
