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authorMagnus Damm <damm@opensource.se>2010-09-24 09:05:38 +0000
committerPaul Mundt <lethal@linux-sh.org>2010-09-30 09:43:32 +0900
commit68a1aed7039e5a94a8e60e23fdf676738c36086a (patch)
tree493699f8b085269298c49569f104b3c43e80d242
parent4c62c595c2a23fb36a0b901b550115370047a137 (diff)
downloadop-kernel-dev-68a1aed7039e5a94a8e60e23fdf676738c36086a.zip
op-kernel-dev-68a1aed7039e5a94a8e60e23fdf676738c36086a.tar.gz
sh: boot kernel with SR.BL set
Update the SH kernel to keep SR.BL set until the VBR register has been initialized. Useful to allow boot of the kernel even though exceptions are pending. Without this patch there is a window of time when exceptions such as NMI are enabled but no exception handlers are installed. This patch modifies both the zImage loader and the actual kernel to boot with BL=1, but the zImage loader is modfied in such a way that the init_sr value is unchanged to not break the zImage loader provided by kexec. Tested on sh7724 Ecovec and on the SH4AL-DSP core included in sh7372. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-rw-r--r--arch/sh/boot/compressed/head_32.S4
-rw-r--r--arch/sh/kernel/head_32.S2
-rw-r--r--arch/sh/kernel/traps_32.c3
3 files changed, 7 insertions, 2 deletions
diff --git a/arch/sh/boot/compressed/head_32.S b/arch/sh/boot/compressed/head_32.S
index 200c1d4..3e15032 100644
--- a/arch/sh/boot/compressed/head_32.S
+++ b/arch/sh/boot/compressed/head_32.S
@@ -91,7 +91,9 @@ bss_start_addr:
end_addr:
.long _end
init_sr:
- .long 0x400000F0 /* Privileged mode, Bank=0, Block=0, IMASK=0xF */
+ .long 0x500000F0 /* Privileged mode, Bank=0, Block=1, IMASK=0xF */
+kexec_magic:
+ .long 0x400000F0 /* magic used by kexec to parse zImage format */
init_stack_addr:
.long stack_start
decompress_kernel_addr:
diff --git a/arch/sh/kernel/head_32.S b/arch/sh/kernel/head_32.S
index 6e35f01..7db2489 100644
--- a/arch/sh/kernel/head_32.S
+++ b/arch/sh/kernel/head_32.S
@@ -330,7 +330,7 @@ ENTRY(_stext)
#if defined(CONFIG_CPU_SH2)
1: .long 0x000000F0 ! IMASK=0xF
#else
-1: .long 0x400080F0 ! MD=1, RB=0, BL=0, FD=1, IMASK=0xF
+1: .long 0x500080F0 ! MD=1, RB=0, BL=1, FD=1, IMASK=0xF
#endif
ENTRY(stack_start)
2: .long init_thread_union+THREAD_SIZE
diff --git a/arch/sh/kernel/traps_32.c b/arch/sh/kernel/traps_32.c
index c3d86fa..f561352 100644
--- a/arch/sh/kernel/traps_32.c
+++ b/arch/sh/kernel/traps_32.c
@@ -802,6 +802,9 @@ void __cpuinit per_cpu_trap_init(void)
: /* no output */
: "r" (&vbr_base)
: "memory");
+
+ /* disable exception blocking now when the vbr has been setup */
+ clear_bl_bit();
}
void *set_exception_table_vec(unsigned int vec, void *handler)
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