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authorBen Dooks <ben-linux@fluff.org>2008-10-21 14:06:35 +0100
committerBen Dooks <ben-linux@fluff.org>2008-12-15 21:46:41 +0000
commit9bc1aaeac0118611c30edf84995ebad5adfd6822 (patch)
treea274b3dfe8c52c191c6483877fb302418f26b480
parentbcae8aeb320dfe8dde4b3512237a5b76737b0120 (diff)
downloadop-kernel-dev-9bc1aaeac0118611c30edf84995ebad5adfd6822.zip
op-kernel-dev-9bc1aaeac0118611c30edf84995ebad5adfd6822.tar.gz
[ARM] S3C24XX: Split timer pending code out
Split the timer pending code out to a seperate per-machine header so that when compiling for mach-s3c2410 or mach-s3c24a0 we can use the right timer code without having to #ifdef the timer driver. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
-rw-r--r--arch/arm/mach-s3c2410/include/mach/tick.h15
-rw-r--r--arch/arm/mach-s3c24a0/include/mach/tick.h15
-rw-r--r--arch/arm/plat-s3c/time.c7
3 files changed, 32 insertions, 5 deletions
diff --git a/arch/arm/mach-s3c2410/include/mach/tick.h b/arch/arm/mach-s3c2410/include/mach/tick.h
new file mode 100644
index 0000000..544da41
--- /dev/null
+++ b/arch/arm/mach-s3c2410/include/mach/tick.h
@@ -0,0 +1,15 @@
+/* linux/arch/arm/mach-s3c2410/include/mach/tick.h
+ *
+ * Copyright 2008 Simtec Electronics
+ * Ben Dooks <ben@simtec.co.uk>
+ * http://armlinux.simtec.co.uk/
+ *
+ * S3C2410 - timer tick support
+ */
+
+#define SRCPND_TIMER4 (1<<(IRQ_TIMER4 - IRQ_EINT0))
+
+static inline int s3c24xx_ostimer_pending(void)
+{
+ return __raw_readl(S3C2410_SRCPND) & SRCPND_TIMER4;
+}
diff --git a/arch/arm/mach-s3c24a0/include/mach/tick.h b/arch/arm/mach-s3c24a0/include/mach/tick.h
new file mode 100644
index 0000000..9dea8ba
--- /dev/null
+++ b/arch/arm/mach-s3c24a0/include/mach/tick.h
@@ -0,0 +1,15 @@
+/* linux/arch/arm/mach-s3c24a0/include/mach/tick.h
+ *
+ * Copyright 2008 Simtec Electronics
+ * Ben Dooks <ben@simtec.co.uk>
+ * http://armlinux.simtec.co.uk/
+ *
+ * S3C24A0 - timer tick support
+ */
+
+#define SUBSRC_TIMER4 (1 << (IRQ_TIMER4 - IRQ_S3CUART_RX0))
+
+static inline int s3c24xx_ostimer_pending(void)
+{
+ return __raw_readl(S3C2410_SUBSRCPND) & SUBSRC_TIMER4;
+}
diff --git a/arch/arm/plat-s3c/time.c b/arch/arm/plat-s3c/time.c
index c6861a0..d35e149 100644
--- a/arch/arm/plat-s3c/time.c
+++ b/arch/arm/plat-s3c/time.c
@@ -36,6 +36,7 @@
#include <plat/regs-timer.h>
#include <mach/regs-irq.h>
#include <asm/mach/time.h>
+#include <mach/tick.h>
#include <plat/clock.h>
#include <plat/cpu.h>
@@ -91,12 +92,9 @@ static inline unsigned long timer_ticks_to_usec(unsigned long ticks)
* IRQs are disabled before entering here from do_gettimeofday()
*/
-#define SRCPND_TIMER4 (1<<(IRQ_TIMER4 - IRQ_EINT0))
-
static unsigned long s3c2410_gettimeoffset (void)
{
unsigned long tdone;
- unsigned long irqpend;
unsigned long tval;
/* work out how many ticks have gone since last timer interrupt */
@@ -106,8 +104,7 @@ static unsigned long s3c2410_gettimeoffset (void)
/* check to see if there is an interrupt pending */
- irqpend = __raw_readl(S3C2410_SRCPND);
- if (irqpend & SRCPND_TIMER4) {
+ if (s3c24xx_ostimer_pending()) {
/* re-read the timer, and try and fix up for the missed
* interrupt. Note, the interrupt may go off before the
* timer has re-loaded from wrapping.
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