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authorValentin Longchamp <valentin.longchamp@epfl.ch>2009-08-10 18:33:10 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2009-08-14 12:40:48 +0200
commit89829d5fe31dc42825f2560c3c2c641709ed594e (patch)
tree3992124c9b203e8d110a27073718c88fdd44b022
parent94da274b4982f5b36b55bde0c76d3ef8233bceda (diff)
downloadop-kernel-dev-89829d5fe31dc42825f2560c3c2c641709ed594e.zip
op-kernel-dev-89829d5fe31dc42825f2560c3c2c641709ed594e.tar.gz
mx31: added one more pin definition
Signed-off-by: Valentin Longchamp <valentin.longchamp@epfl.ch> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
-rw-r--r--arch/arm/plat-mxc/include/mach/iomux-mx3.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx3.h b/arch/arm/plat-mxc/include/mach/iomux-mx3.h
index a3b206c..6745273 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx3.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mx3.h
@@ -682,6 +682,7 @@ enum iomux_pins {
#define MX31_PIN_GPIO3_0__GPIO3_0 IOMUX_MODE(MX31_PIN_GPIO3_0, IOMUX_CONFIG_GPIO)
#define MX31_PIN_GPIO3_1__GPIO3_1 IOMUX_MODE(MX31_PIN_GPIO3_1, IOMUX_CONFIG_GPIO)
#define MX31_PIN_TXD2__GPIO1_28 IOMUX_MODE(MX31_PIN_TXD2, IOMUX_CONFIG_GPIO)
+#define MX31_PIN_GPIO1_0__GPIO1_0 IOMUX_MODE(MX31_PIN_GPIO1_0, IOMUX_CONFIG_GPIO)
/*XXX: The SS0, SS1, SS2, SS3 lines of spi3 are multiplexed by cspi2_ss0, cspi2_ss1, cspi1_ss0
* cspi1_ss1*/
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