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authorSachin Kamat <sachin.kamat@linaro.org>2013-07-12 08:53:43 +0530
committerJiri Kosina <jkosina@suse.cz>2013-07-25 12:33:12 +0200
commit30abda170be7cbd9bce9a7026ce83ce1f74c0e7a (patch)
treeb48bccca10bf5f9b172cc6983336153e159eaa11
parent9ca18397760824491bac572d6600eb3db3331a14 (diff)
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Documentation: clk: Fix a trivial typo in audss
Fixes a trivial typo. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
-rw-r--r--Documentation/devicetree/bindings/clock/clk-exynos-audss.txt2
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/clock/clk-exynos-audss.txt b/Documentation/devicetree/bindings/clock/clk-exynos-audss.txt
index a120180..75e2e19 100644
--- a/Documentation/devicetree/bindings/clock/clk-exynos-audss.txt
+++ b/Documentation/devicetree/bindings/clock/clk-exynos-audss.txt
@@ -2,7 +2,7 @@
The Samsung Audio Subsystem clock controller generates and supplies clocks
to Audio Subsystem block available in the S5PV210 and Exynos SoCs. The clock
-binding described here is applicable to all SoC's in Exynos family.
+binding described here is applicable to all SoCs in Exynos family.
Required Properties:
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