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authorEric Anholt <eric@anholt.net>2016-04-13 13:28:43 -0700
committerMarc Zyngier <marc.zyngier@arm.com>2016-05-11 10:13:00 +0100
commita1dcbd11d09be1cb357b2f217c0eaa1461128da0 (patch)
tree8246d163344fbe26dca0691602ceeff2d6503733
parentcb290d827eb0378447095093b4ea712482d31ae8 (diff)
downloadop-kernel-dev-a1dcbd11d09be1cb357b2f217c0eaa1461128da0.zip
op-kernel-dev-a1dcbd11d09be1cb357b2f217c0eaa1461128da0.tar.gz
irqchip/bcm2836: Use a more generic memory barrier call
dsb() requires an argument on arm64, so we needed to add "sy". Instead, take this opportunity to switch to the same smp_wmb() call that gic uses for its IPIs. This is a less strong barrier than we were doing before (dmb(ishst) compared to dsb(sy)), but it seems to be the correct one. Signed-off-by: Eric Anholt <eric@anholt.net> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
-rw-r--r--drivers/irqchip/irq-bcm2836.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/irqchip/irq-bcm2836.c b/drivers/irqchip/irq-bcm2836.c
index f8141bd..72ff1d5 100644
--- a/drivers/irqchip/irq-bcm2836.c
+++ b/drivers/irqchip/irq-bcm2836.c
@@ -195,7 +195,7 @@ static void bcm2836_arm_irqchip_send_ipi(const struct cpumask *mask,
* Ensure that stores to normal memory are visible to the
* other CPUs before issuing the IPI.
*/
- dsb();
+ smp_wmb();
for_each_cpu(cpu, mask) {
writel(1 << ipi, mailbox0_base + 16 * cpu);
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