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authorFelipe Balbi <balbi@ti.com>2011-12-14 21:59:30 +0200
committerFelipe Balbi <balbi@ti.com>2011-12-14 21:59:30 +0200
commit248b122b131202de95aaa3670e48465619bdff14 (patch)
tree4ed36bb0a2f06ef0efa4dcf0777a1253c171f686
parentccc080c77cd47fde5eb097058fae930b956096eb (diff)
downloadop-kernel-dev-248b122b131202de95aaa3670e48465619bdff14.zip
op-kernel-dev-248b122b131202de95aaa3670e48465619bdff14.tar.gz
usb: dwc3: core: fix cached revision on our structure
All our revision macros are defined with the entire 32-bits which we read from GSNPSID register, so we must cache all 32-bits properly rather than masking the top 16-bits. This will fix all revision checks we have on current driver. Signed-off-by: Felipe Balbi <balbi@ti.com>
-rw-r--r--drivers/usb/dwc3/core.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 717ebc9..600d823 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -264,7 +264,7 @@ static int __devinit dwc3_core_init(struct dwc3 *dwc)
ret = -ENODEV;
goto err0;
}
- dwc->revision = reg & DWC3_GSNPSREV_MASK;
+ dwc->revision = reg;
dwc3_core_soft_reset(dwc);
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