summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorGraf Yang <graf.yang@analog.com>2009-06-18 04:21:39 +0000
committerMike Frysinger <vapier@gentoo.org>2009-06-22 21:16:10 -0400
commit8f580f7c82ed9edeb3629568aabcde2caff3f236 (patch)
treebee9b63a22eb29a36134e87f8de2dd7f3a7d6726
parentfa48f84a8cc722ca48b32fa0c338b6c3b358717d (diff)
downloadop-kernel-dev-8f580f7c82ed9edeb3629568aabcde2caff3f236.zip
op-kernel-dev-8f580f7c82ed9edeb3629568aabcde2caff3f236.tar.gz
Blackfin: fix typo in TRAS define in mem_init.h header
We defined SDRAM_tRAS to TRAS_4, but then wrongly defined SDRAM_tRAS_num to 3. Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
-rw-r--r--arch/blackfin/include/asm/mem_init.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/blackfin/include/asm/mem_init.h b/arch/blackfin/include/asm/mem_init.h
index 61f7487..fc164b3 100644
--- a/arch/blackfin/include/asm/mem_init.h
+++ b/arch/blackfin/include/asm/mem_init.h
@@ -59,7 +59,7 @@
#define SDRAM_tRP TRP_1
#define SDRAM_tRP_num 1
#define SDRAM_tRAS TRAS_4
-#define SDRAM_tRAS_num 3
+#define SDRAM_tRAS_num 4
#define SDRAM_tRCD TRCD_1
#define SDRAM_tWR TWR_2
#endif
OpenPOWER on IntegriCloud