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authorEric Anholt <eric@anholt.net>2010-01-26 09:43:10 -0800
committerEric Anholt <eric@anholt.net>2010-02-16 11:48:44 -0800
commitb397c836eff58cd9a43f7bd8b853a51b3ecc3420 (patch)
tree94aad6c12a1f5bb819af28489a9bcb670df36da1
parentc4804411691bdd7d8a57e942cbb502fd52a90074 (diff)
downloadop-kernel-dev-b397c836eff58cd9a43f7bd8b853a51b3ecc3420.zip
op-kernel-dev-b397c836eff58cd9a43f7bd8b853a51b3ecc3420.tar.gz
drm/i915: Don't reserve compatibility fence regs in KMS mode.
The fence start is for compatibility with UMS X Servers before fence management. KMS X Servers only started doing tiling after fence management appeared. Signed-off-by: Eric Anholt <eric@anholt.net>
-rw-r--r--drivers/gpu/drm/i915/i915_gem.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 129ac36..4a14199 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -4794,7 +4794,8 @@ i915_gem_load(struct drm_device *dev)
spin_unlock(&shrink_list_lock);
/* Old X drivers will take 0-2 for front, back, depth buffers */
- dev_priv->fence_reg_start = 3;
+ if (!drm_core_check_feature(dev, DRIVER_MODESET))
+ dev_priv->fence_reg_start = 3;
if (IS_I965G(dev) || IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev))
dev_priv->num_fence_regs = 16;
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