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author | Stephen Warren <swarren@nvidia.com> | 2011-10-11 16:16:13 -0600 |
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committer | Olof Johansson <olof@lixom.net> | 2011-10-11 17:19:56 -0700 |
commit | f62f548c1c04742f68c15e21f173712dd6633791 (patch) | |
tree | b5117bfb47d7d839aa19bc768b56525897a199e2 | |
parent | 940dd96fe9dec5b6ba4bb7ebc33212ff66db243c (diff) | |
download | op-kernel-dev-f62f548c1c04742f68c15e21f173712dd6633791.zip op-kernel-dev-f62f548c1c04742f68c15e21f173712dd6633791.tar.gz |
arm/dt: Tegra: Add pinmux node to tegra20.dtsi
Add a pinmux node to tegra20.dtsi in order to instantiate the future
pinmux device.
v2: Specify reg property precisely; don't just point at the whole APB_MISC
register range.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
-rw-r--r-- | Documentation/devicetree/bindings/pinmux/pinmux_nvidia.txt | 5 | ||||
-rw-r--r-- | arch/arm/boot/dts/tegra20.dtsi | 8 |
2 files changed, 13 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/pinmux/pinmux_nvidia.txt b/Documentation/devicetree/bindings/pinmux/pinmux_nvidia.txt new file mode 100644 index 0000000..36f82db --- /dev/null +++ b/Documentation/devicetree/bindings/pinmux/pinmux_nvidia.txt @@ -0,0 +1,5 @@ +NVIDIA Tegra 2 pinmux controller + +Required properties: +- compatible : "nvidia,tegra20-pinmux" + diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index 5727595..65d7e6a 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi @@ -77,6 +77,14 @@ gpio-controller; }; + pinmux: pinmux@70000000 { + compatible = "nvidia,tegra20-pinmux"; + reg = < 0x70000014 0x10 /* Tri-state registers */ + 0x70000080 0x20 /* Mux registers */ + 0x700000a0 0x14 /* Pull-up/down registers */ + 0x70000868 0xa8 >; /* Pad control registers */ + }; + serial@70006000 { compatible = "nvidia,tegra20-uart"; reg = <0x70006000 0x40>; |