diff options
| author | Liu Shuo <b35362@freescale.com> | 2011-12-04 12:31:36 +0800 |
|---|---|---|
| committer | David Woodhouse <David.Woodhouse@intel.com> | 2012-01-09 18:13:10 +0000 |
| commit | a9a552f0bf6258c3593e8887c7212f0fbec8b44c (patch) | |
| tree | aa4a9ffa2c1e8e289e64031819e152321de92801 | |
| parent | b604436cb06626363f0da357759797a5e1894baf (diff) | |
| download | op-kernel-dev-a9a552f0bf6258c3593e8887c7212f0fbec8b44c.zip op-kernel-dev-a9a552f0bf6258c3593e8887c7212f0fbec8b44c.tar.gz | |
mtd: nand: use elbc_fcm_ctrl->oob to set FPAR_MS bit of FPAR
On both of large-page chip and small-page chip, we always should use
'elbc_fcm_ctrl->oob' to set the FPAR_LP_MS/FPAR_SP_MS bit of FPAR, don't
use a overflowed 'column' to set it.
Signed-off-by: Liu Shuo <b35362@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| -rw-r--r-- | drivers/mtd/nand/fsl_elbc_nand.c | 18 |
1 files changed, 11 insertions, 7 deletions
diff --git a/drivers/mtd/nand/fsl_elbc_nand.c b/drivers/mtd/nand/fsl_elbc_nand.c index f2f6e87..c554c2f 100644 --- a/drivers/mtd/nand/fsl_elbc_nand.c +++ b/drivers/mtd/nand/fsl_elbc_nand.c @@ -407,9 +407,17 @@ static void fsl_elbc_cmdfunc(struct mtd_info *mtd, unsigned int command, page_addr, column); elbc_fcm_ctrl->column = column; - elbc_fcm_ctrl->oob = 0; elbc_fcm_ctrl->use_mdr = 1; + if (column >= mtd->writesize) { + /* OOB area */ + column -= mtd->writesize; + elbc_fcm_ctrl->oob = 1; + } else { + WARN_ON(column != 0); + elbc_fcm_ctrl->oob = 0; + } + fcr = (NAND_CMD_STATUS << FCR_CMD1_SHIFT) | (NAND_CMD_SEQIN << FCR_CMD2_SHIFT) | (NAND_CMD_PAGEPROG << FCR_CMD3_SHIFT); @@ -434,16 +442,12 @@ static void fsl_elbc_cmdfunc(struct mtd_info *mtd, unsigned int command, (FIR_OP_CW1 << FIR_OP6_SHIFT) | (FIR_OP_RS << FIR_OP7_SHIFT)); - if (column >= mtd->writesize) { + if (elbc_fcm_ctrl->oob) /* OOB area --> READOOB */ - column -= mtd->writesize; fcr |= NAND_CMD_READOOB << FCR_CMD0_SHIFT; - elbc_fcm_ctrl->oob = 1; - } else { - WARN_ON(column != 0); + else /* First 256 bytes --> READ0 */ fcr |= NAND_CMD_READ0 << FCR_CMD0_SHIFT; - } } out_be32(&lbc->fcr, fcr); |
