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authorLiu Shuo <b35362@freescale.com>2011-12-09 17:42:54 +0800
committerDavid Woodhouse <David.Woodhouse@intel.com>2012-01-09 18:18:29 +0000
commit9ae84fe8c18cabc348b9c7cd1e98419cd0cbf481 (patch)
tree28805967c5d4b64c30d3c8de01d1b067bba55ac1
parent556f063580db2953a7e53cd46b47724246320f60 (diff)
downloadop-kernel-dev-9ae84fe8c18cabc348b9c7cd1e98419cd0cbf481.zip
op-kernel-dev-9ae84fe8c18cabc348b9c7cd1e98419cd0cbf481.tar.gz
mtd: fsl_elbc_nand: set Nand flash page address to FBAR and FPAR correctly
If we use the Nand flash chip whose number of pages in a block is greater than 64(for large page), we must treat the low bit of FBAR as being the high bit of the page address due to the limitation of FCM, it simply uses the low 6-bits (for large page) of the combined block/page address as the FPAR component, rather than considering the actual block size. Signed-off-by: Liu Shuo <b35362@freescale.com> Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com> Signed-off-by: Tang Yuantian <b29983@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
-rw-r--r--drivers/mtd/nand/fsl_elbc_nand.c13
1 files changed, 10 insertions, 3 deletions
diff --git a/drivers/mtd/nand/fsl_elbc_nand.c b/drivers/mtd/nand/fsl_elbc_nand.c
index 7db573e..d29479a 100644
--- a/drivers/mtd/nand/fsl_elbc_nand.c
+++ b/drivers/mtd/nand/fsl_elbc_nand.c
@@ -166,15 +166,22 @@ static void set_addr(struct mtd_info *mtd, int column, int page_addr, int oob)
elbc_fcm_ctrl->page = page_addr;
- out_be32(&lbc->fbar,
- page_addr >> (chip->phys_erase_shift - chip->page_shift));
-
if (priv->page_size) {
+ /*
+ * large page size chip : FPAR[PI] save the lowest 6 bits,
+ * FBAR[BLK] save the other bits.
+ */
+ out_be32(&lbc->fbar, page_addr >> 6);
out_be32(&lbc->fpar,
((page_addr << FPAR_LP_PI_SHIFT) & FPAR_LP_PI) |
(oob ? FPAR_LP_MS : 0) | column);
buf_num = (page_addr & 1) << 2;
} else {
+ /*
+ * small page size chip : FPAR[PI] save the lowest 5 bits,
+ * FBAR[BLK] save the other bits.
+ */
+ out_be32(&lbc->fbar, page_addr >> 5);
out_be32(&lbc->fpar,
((page_addr << FPAR_SP_PI_SHIFT) & FPAR_SP_PI) |
(oob ? FPAR_SP_MS : 0) | column);
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