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authorTim Abbott <tabbott@MIT.EDU>2009-04-27 14:02:22 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2009-04-27 19:51:58 -0700
commit991da17ec0b9f396154c8120ffd10e5d7d7aa361 (patch)
treee53b6ce7d3482afb516e806bfc69966a6af0b7c0
parentdf1f6d200c1e20788184251c49f349b38d90889c (diff)
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arm: Use __INIT macro instead of .text.init.
arm is placing some code in the .text.init section, but it does not reference that section in its linker scripts. This change moves this code from the .text.init section to the .init.text section, which is presumably where it belongs. Signed-off-by: Tim Abbott <tabbott@mit.edu> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
-rw-r--r--arch/arm/mm/proc-v6.S3
-rw-r--r--arch/arm/mm/proc-v7.S3
-rw-r--r--arch/arm/mm/tlb-v6.S3
-rw-r--r--arch/arm/mm/tlb-v7.S3
4 files changed, 8 insertions, 4 deletions
diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S
index f0cc599..087e239 100644
--- a/arch/arm/mm/proc-v6.S
+++ b/arch/arm/mm/proc-v6.S
@@ -10,6 +10,7 @@
*
* This is the "shell" of the ARMv6 processor support.
*/
+#include <linux/init.h>
#include <linux/linkage.h>
#include <asm/assembler.h>
#include <asm/asm-offsets.h>
@@ -132,7 +133,7 @@ cpu_v6_name:
.asciz "ARMv6-compatible processor"
.align
- .section ".text.init", #alloc, #execinstr
+ __INIT
/*
* __v6_setup
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index d1ebec4..c221e26 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -9,6 +9,7 @@
*
* This is the "shell" of the ARMv7 processor support.
*/
+#include <linux/init.h>
#include <linux/linkage.h>
#include <asm/assembler.h>
#include <asm/asm-offsets.h>
@@ -153,7 +154,7 @@ cpu_v7_name:
.ascii "ARMv7 Processor"
.align
- .section ".text.init", #alloc, #execinstr
+ __INIT
/*
* __v7_setup
diff --git a/arch/arm/mm/tlb-v6.S b/arch/arm/mm/tlb-v6.S
index 20f84bb..73d7d89 100644
--- a/arch/arm/mm/tlb-v6.S
+++ b/arch/arm/mm/tlb-v6.S
@@ -10,6 +10,7 @@
* ARM architecture version 6 TLB handling functions.
* These assume a split I/D TLB.
*/
+#include <linux/init.h>
#include <linux/linkage.h>
#include <asm/asm-offsets.h>
#include <asm/page.h>
@@ -87,7 +88,7 @@ ENTRY(v6wbi_flush_kern_tlb_range)
mcr p15, 0, r2, c7, c5, 4 @ prefetch flush
mov pc, lr
- .section ".text.init", #alloc, #execinstr
+ __INIT
.type v6wbi_tlb_fns, #object
ENTRY(v6wbi_tlb_fns)
diff --git a/arch/arm/mm/tlb-v7.S b/arch/arm/mm/tlb-v7.S
index 24ba510..b637e73 100644
--- a/arch/arm/mm/tlb-v7.S
+++ b/arch/arm/mm/tlb-v7.S
@@ -11,6 +11,7 @@
* ARM architecture version 6 TLB handling functions.
* These assume a split I/D TLB.
*/
+#include <linux/init.h>
#include <linux/linkage.h>
#include <asm/asm-offsets.h>
#include <asm/page.h>
@@ -80,7 +81,7 @@ ENTRY(v7wbi_flush_kern_tlb_range)
mov pc, lr
ENDPROC(v7wbi_flush_kern_tlb_range)
- .section ".text.init", #alloc, #execinstr
+ __INIT
.type v7wbi_tlb_fns, #object
ENTRY(v7wbi_tlb_fns)
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