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| author | Eugene Surovegin <ebs@ebshome.net> | 2006-04-25 01:22:44 -0700 |
|---|---|---|
| committer | Paul Mackerras <paulus@samba.org> | 2006-04-28 21:04:56 +1000 |
| commit | 30aacebed0f0619f23ce84df7c59ad033ca08d77 (patch) | |
| tree | fb32292e6804fdab515227a0b7d9722e9595d532 | |
| parent | 1269277a5e7c6d7ae1852e648a8bcdb78035e9fa (diff) | |
| download | op-kernel-dev-30aacebed0f0619f23ce84df7c59ad033ca08d77.zip op-kernel-dev-30aacebed0f0619f23ce84df7c59ad033ca08d77.tar.gz | |
[PATCH] ppc32: add 440GX erratum 440_43 workaround
This patch adds workaround for PPC 440GX erratum 440_43. According to
this erratum spurious MachineChecks (caused by L1 cache parity) can
happen during DataTLB miss processing. We disable L1 cache parity
checking for 440GX rev.C and rev.F
Signed-off-by: Eugene Surovegin <ebs@ebshome.net>
Signed-off-by: Paul Mackerras <paulus@samba.org>
| -rw-r--r-- | arch/ppc/platforms/4xx/ocotea.c | 2 | ||||
| -rw-r--r-- | arch/ppc/syslib/ibm440gx_common.c | 13 | ||||
| -rw-r--r-- | arch/ppc/syslib/ibm440gx_common.h | 4 | ||||
| -rw-r--r-- | include/asm-ppc/reg_booke.h | 1 |
4 files changed, 18 insertions, 2 deletions
diff --git a/arch/ppc/platforms/4xx/ocotea.c b/arch/ppc/platforms/4xx/ocotea.c index f841972..554776d 100644 --- a/arch/ppc/platforms/4xx/ocotea.c +++ b/arch/ppc/platforms/4xx/ocotea.c @@ -331,7 +331,7 @@ static void __init ocotea_init(void) void __init platform_init(unsigned long r3, unsigned long r4, unsigned long r5, unsigned long r6, unsigned long r7) { - ibm44x_platform_init(r3, r4, r5, r6, r7); + ibm440gx_platform_init(r3, r4, r5, r6, r7); ppc_md.setup_arch = ocotea_setup_arch; ppc_md.show_cpuinfo = ocotea_show_cpuinfo; diff --git a/arch/ppc/syslib/ibm440gx_common.c b/arch/ppc/syslib/ibm440gx_common.c index a7dd55f..f6cc168 100644 --- a/arch/ppc/syslib/ibm440gx_common.c +++ b/arch/ppc/syslib/ibm440gx_common.c @@ -2,7 +2,7 @@ * PPC440GX system library * * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net> - * Copyright (c) 2003, 2004 Zultys Technologies + * Copyright (c) 2003 - 2006 Zultys Technologies * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the @@ -282,3 +282,14 @@ int ibm440gx_show_cpuinfo(struct seq_file *m){ return 0; } +void __init ibm440gx_platform_init(unsigned long r3, unsigned long r4, + unsigned long r5, unsigned long r6, + unsigned long r7) +{ + /* Erratum 440_43 workaround, disable L1 cache parity checking */ + if (!strcmp(cur_cpu_spec->cpu_name, "440GX Rev. C") || + !strcmp(cur_cpu_spec->cpu_name, "440GX Rev. F")) + mtspr(SPRN_CCR1, mfspr(SPRN_CCR1) | CCR1_DPC); + + ibm44x_platform_init(r3, r4, r5, r6, r7); +} diff --git a/arch/ppc/syslib/ibm440gx_common.h b/arch/ppc/syslib/ibm440gx_common.h index a2ab9fa..a03ec602 100644 --- a/arch/ppc/syslib/ibm440gx_common.h +++ b/arch/ppc/syslib/ibm440gx_common.h @@ -29,6 +29,10 @@ void ibm440gx_get_clocks(struct ibm44x_clocks*, unsigned int sys_clk, unsigned int ser_clk) __init; +/* common 440GX platform init */ +void ibm440gx_platform_init(unsigned long r3, unsigned long r4, unsigned long r5, + unsigned long r6, unsigned long r7) __init; + /* Enable L2 cache */ void ibm440gx_l2c_enable(void) __init; diff --git a/include/asm-ppc/reg_booke.h b/include/asm-ppc/reg_booke.h index 00ad9c7..4944c0f 100644 --- a/include/asm-ppc/reg_booke.h +++ b/include/asm-ppc/reg_booke.h @@ -237,6 +237,7 @@ do { \ #endif /* Bit definitions for CCR1. */ +#define CCR1_DPC 0x00000100 /* Disable L1 I-Cache/D-Cache parity checking */ #define CCR1_TCS 0x00000080 /* Timer Clock Select */ /* Bit definitions for the MCSR. */ |
