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authorEilon Greenstein <eilong@broadcom.com>2009-03-02 07:59:20 +0000
committerDavid S. Miller <davem@davemloft.net>2009-03-02 22:32:37 -0800
commit0d1a8d2d7dd9f6588ed9544a9aa88fd9bd9467d3 (patch)
tree4b3d3b94462f29e9dcab2b7eb0002467b2e046d5
parent98589bb1099732847c5deedc213c17c50dd1bc75 (diff)
downloadop-kernel-dev-0d1a8d2d7dd9f6588ed9544a9aa88fd9bd9467d3.zip
op-kernel-dev-0d1a8d2d7dd9f6588ed9544a9aa88fd9bd9467d3.tar.gz
bnx2x: Misleading name
As noted by Ben Hutchings <bhutchings@solarflare.com>, these are the capabilities offsets and not the ID itself Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r--drivers/net/bnx2x_reg.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/net/bnx2x_reg.h b/drivers/net/bnx2x_reg.h
index 360a256..8de80cc 100644
--- a/drivers/net/bnx2x_reg.h
+++ b/drivers/net/bnx2x_reg.h
@@ -5410,7 +5410,7 @@
#define PCICFG_COMMAND_INT_DISABLE (1<<10)
#define PCICFG_COMMAND_RESERVED (0x1f<<11)
#define PCICFG_STATUS_OFFSET 0x06
-#define PCICFG_REVESION_ID 0x08
+#define PCICFG_REVESION_ID_OFFSET 0x08
#define PCICFG_CACHE_LINE_SIZE 0x0c
#define PCICFG_LATENCY_TIMER 0x0d
#define PCICFG_BAR_1_LOW 0x10
@@ -5438,7 +5438,7 @@
#define PCICFG_PM_CSR_STATE (0x3<<0)
#define PCICFG_PM_CSR_PME_ENABLE (1<<8)
#define PCICFG_PM_CSR_PME_STATUS (1<<15)
-#define PCICFG_MSI_CAP_ID 0x58
+#define PCICFG_MSI_CAP_ID_OFFSET 0x58
#define PCICFG_MSI_CONTROL_ENABLE (0x1<<16)
#define PCICFG_MSI_CONTROL_MCAP (0x7<<17)
#define PCICFG_MSI_CONTROL_MENA (0x7<<20)
@@ -5446,7 +5446,7 @@
#define PCICFG_MSI_CONTROL_MSI_PVMASK_CAPABLE (0x1<<24)
#define PCICFG_GRC_ADDRESS 0x78
#define PCICFG_GRC_DATA 0x80
-#define PCICFG_MSIX_CAP_ID 0xa0
+#define PCICFG_MSIX_CAP_ID_OFFSET 0xa0
#define PCICFG_MSIX_CONTROL_TABLE_SIZE (0x7ff<<16)
#define PCICFG_MSIX_CONTROL_RESERVED (0x7<<27)
#define PCICFG_MSIX_CONTROL_FUNC_MASK (0x1<<30)
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