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| author | Ralf Baechle <ralf@linux-mips.org> | 2006-08-01 23:42:30 +0100 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2006-09-27 13:37:23 +0100 |
| commit | df586d59a4f069bb60a94ff4e5b64fe5c876f72c (patch) | |
| tree | c7a750e05fae3a7952590e63d84239b0d64f8283 | |
| parent | 1b4ee40a1330cad05e1cf65b60d8c82732bcafba (diff) | |
| download | op-kernel-dev-df586d59a4f069bb60a94ff4e5b64fe5c876f72c.zip op-kernel-dev-df586d59a4f069bb60a94ff4e5b64fe5c876f72c.tar.gz | |
[MIPS] c-r4k: Typo fix.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| -rw-r--r-- | arch/mips/mm/c-r4k.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c index 069803f..b3ccb87 100644 --- a/arch/mips/mm/c-r4k.c +++ b/arch/mips/mm/c-r4k.c @@ -1242,7 +1242,7 @@ static inline void coherency_setup(void) clear_c0_config(CONF_CU); break; /* - * We need to catch the ealry Alchemy SOCs with + * We need to catch the early Alchemy SOCs with * the write-only co_config.od bit and set it back to one... */ case CPU_AU1000: /* rev. DA, HA, HB */ |
