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authorKumar Gala <galak@gate.crashing.org>2005-11-13 16:06:49 -0800
committerLinus Torvalds <torvalds@g5.osdl.org>2005-11-13 18:14:13 -0800
commit647422868e48c9abd8ab85ad2a7de9161170ec89 (patch)
tree8792808d399cf186e7906f04277b964b4e31ef2e
parent7fce260a6bf75080ef61408504add5618f90e41b (diff)
downloadop-kernel-dev-647422868e48c9abd8ab85ad2a7de9161170ec89.zip
op-kernel-dev-647422868e48c9abd8ab85ad2a7de9161170ec89.tar.gz
[PATCH] ppc32: Add support for handling PCI interrupts on MPC834x PCI expansion card
The MPC8349 PIBs system has a expansion board with 6 PCI slots. We needed to update the IDSEL interrupt mapping for it to work properly. However, only PCI1 is supported as the first revision of this expansion board doesn't function properly for PCI2. For the time being we have zero'd out the entries for the IDSELs related to PCI2. When a functioning expansion board exists we can fix the table. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
-rw-r--r--arch/ppc/platforms/83xx/mpc834x_sys.c15
1 files changed, 11 insertions, 4 deletions
diff --git a/arch/ppc/platforms/83xx/mpc834x_sys.c b/arch/ppc/platforms/83xx/mpc834x_sys.c
index 84efc0c..04bdc39b 100644
--- a/arch/ppc/platforms/83xx/mpc834x_sys.c
+++ b/arch/ppc/platforms/83xx/mpc834x_sys.c
@@ -73,12 +73,19 @@ mpc83xx_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
* A B C D
*/
{
- {PIRQA, PIRQB, PIRQC, PIRQD}, /* idsel 0x11 */
- {PIRQC, PIRQD, PIRQA, PIRQB}, /* idsel 0x12 */
- {PIRQD, PIRQA, PIRQB, PIRQC} /* idsel 0x13 */
+ {PIRQA, PIRQB, PIRQC, PIRQD}, /* idsel 0x11 */
+ {PIRQC, PIRQD, PIRQA, PIRQB}, /* idsel 0x12 */
+ {PIRQD, PIRQA, PIRQB, PIRQC}, /* idsel 0x13 */
+ {0, 0, 0, 0},
+ {PIRQA, PIRQB, PIRQC, PIRQD}, /* idsel 0x15 */
+ {PIRQD, PIRQA, PIRQB, PIRQC}, /* idsel 0x16 */
+ {PIRQC, PIRQD, PIRQA, PIRQB}, /* idsel 0x17 */
+ {PIRQB, PIRQC, PIRQD, PIRQA}, /* idsel 0x18 */
+ {0, 0, 0, 0}, /* idsel 0x19 */
+ {0, 0, 0, 0}, /* idsel 0x20 */
};
- const long min_idsel = 0x11, max_idsel = 0x13, irqs_per_slot = 4;
+ const long min_idsel = 0x11, max_idsel = 0x20, irqs_per_slot = 4;
return PCI_IRQ_TABLE_LOOKUP;
}
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