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authorShinobu Uehara <shinobu.uehara.xc@renesas.com>2014-10-30 14:57:56 +0900
committerSimon Horman <horms+renesas@verge.net.au>2014-11-10 09:47:42 +0900
commita926a12b5f11007d0ba9eb2e083d86054fb29a06 (patch)
tree80ef1910868efc9712ccb8db624cf68ae4df30a7
parentf114040e3ea6e07372334ade75d1ee0775c355e1 (diff)
downloadop-kernel-dev-a926a12b5f11007d0ba9eb2e083d86054fb29a06.zip
op-kernel-dev-a926a12b5f11007d0ba9eb2e083d86054fb29a06.tar.gz
ARM: shmobile: r8a7790: Fix SD3CKCR address
Signed-off-by: Shinobu Uehara <shinobu.uehara.xc@renesas.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-rw-r--r--arch/arm/mach-shmobile/clock-r8a7790.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c
index 126ddaf..f622652 100644
--- a/arch/arm/mach-shmobile/clock-r8a7790.c
+++ b/arch/arm/mach-shmobile/clock-r8a7790.c
@@ -68,7 +68,7 @@
#define SDCKCR 0xE6150074
#define SD2CKCR 0xE6150078
-#define SD3CKCR 0xE615007C
+#define SD3CKCR 0xE615026C
#define MMC0CKCR 0xE6150240
#define MMC1CKCR 0xE6150244
#define SSPCKCR 0xE6150248
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