diff options
| author | Georgi Djakov <gdjakov@mm-sol.com> | 2014-10-10 16:57:24 +0300 |
|---|---|---|
| committer | Michael Turquette <mturquette@linaro.org> | 2014-11-17 10:40:42 -0800 |
| commit | 9a6cb70f40b0268297024949eb0a2689e3b7769b (patch) | |
| tree | bcc01a555f23ad0b28fb75a7bab442e736b86006 | |
| parent | 69daf75aafc8410ef046c70be65c71f2dd4e08f9 (diff) | |
| download | op-kernel-dev-9a6cb70f40b0268297024949eb0a2689e3b7769b.zip op-kernel-dev-9a6cb70f40b0268297024949eb0a2689e3b7769b.tar.gz | |
clk: qcom: Fix duplicate rbcpr clock name
There is a duplication in a clock name for apq8084 platform that causes
the following warning: "RBCPR_CLK_SRC" redefined
Resolve this by adding a MMSS_ prefix to this clock and making its name
coherent with msm8974 platform.
Fixes: 2b46cd23a5a2 ("clk: qcom: Add APQ8084 Multimedia Clock Controller (MMCC) support")
Signed-off-by: Georgi Djakov <gdjakov@mm-sol.com>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
| -rw-r--r-- | drivers/clk/qcom/mmcc-apq8084.c | 2 | ||||
| -rw-r--r-- | include/dt-bindings/clock/qcom,mmcc-apq8084.h | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/drivers/clk/qcom/mmcc-apq8084.c b/drivers/clk/qcom/mmcc-apq8084.c index dab988a..157139a 100644 --- a/drivers/clk/qcom/mmcc-apq8084.c +++ b/drivers/clk/qcom/mmcc-apq8084.c @@ -3122,7 +3122,7 @@ static struct clk_regmap *mmcc_apq8084_clocks[] = { [ESC1_CLK_SRC] = &esc1_clk_src.clkr, [HDMI_CLK_SRC] = &hdmi_clk_src.clkr, [VSYNC_CLK_SRC] = &vsync_clk_src.clkr, - [RBCPR_CLK_SRC] = &rbcpr_clk_src.clkr, + [MMSS_RBCPR_CLK_SRC] = &rbcpr_clk_src.clkr, [RBBMTIMER_CLK_SRC] = &rbbmtimer_clk_src.clkr, [MAPLE_CLK_SRC] = &maple_clk_src.clkr, [VDP_CLK_SRC] = &vdp_clk_src.clkr, diff --git a/include/dt-bindings/clock/qcom,mmcc-apq8084.h b/include/dt-bindings/clock/qcom,mmcc-apq8084.h index a929f86..d72b5b3 100644 --- a/include/dt-bindings/clock/qcom,mmcc-apq8084.h +++ b/include/dt-bindings/clock/qcom,mmcc-apq8084.h @@ -60,7 +60,7 @@ #define ESC1_CLK_SRC 43 #define HDMI_CLK_SRC 44 #define VSYNC_CLK_SRC 45 -#define RBCPR_CLK_SRC 46 +#define MMSS_RBCPR_CLK_SRC 46 #define RBBMTIMER_CLK_SRC 47 #define MAPLE_CLK_SRC 48 #define VDP_CLK_SRC 49 |
