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author | Stanimir Varbanov <svarbanov@mm-sol.com> | 2014-06-25 19:28:59 +0300 |
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committer | Herbert Xu <herbert@gondor.apana.org.au> | 2014-07-03 21:42:07 +0800 |
commit | 14748d7c5628f01a182de53abdcdb08938996d1d (patch) | |
tree | 18fd658368a2b8e2157894767ef48feb1a0af28f | |
parent | c672752d9c8450cbe051cf6bf93bf35b9645b226 (diff) | |
download | op-kernel-dev-14748d7c5628f01a182de53abdcdb08938996d1d.zip op-kernel-dev-14748d7c5628f01a182de53abdcdb08938996d1d.tar.gz |
ARM: DT: qcom: Add Qualcomm crypto driver binding document
Here is Qualcomm crypto driver device tree binding documentation
to used as a reference example.
Signed-off-by: Stanimir Varbanov <svarbanov@mm-sol.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
-rw-r--r-- | Documentation/devicetree/bindings/crypto/qcom-qce.txt | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/crypto/qcom-qce.txt b/Documentation/devicetree/bindings/crypto/qcom-qce.txt new file mode 100644 index 0000000..fdd53b1 --- /dev/null +++ b/Documentation/devicetree/bindings/crypto/qcom-qce.txt @@ -0,0 +1,25 @@ +Qualcomm crypto engine driver + +Required properties: + +- compatible : should be "qcom,crypto-v5.1" +- reg : specifies base physical address and size of the registers map +- clocks : phandle to clock-controller plus clock-specifier pair +- clock-names : "iface" clocks register interface + "bus" clocks data transfer interface + "core" clocks rest of the crypto block +- dmas : DMA specifiers for tx and rx dma channels. For more see + Documentation/devicetree/bindings/dma/dma.txt +- dma-names : DMA request names should be "rx" and "tx" + +Example: + crypto@fd45a000 { + compatible = "qcom,crypto-v5.1"; + reg = <0xfd45a000 0x6000>; + clocks = <&gcc GCC_CE2_AHB_CLK>, + <&gcc GCC_CE2_AXI_CLK>, + <&gcc GCC_CE2_CLK>; + clock-names = "iface", "bus", "core"; + dmas = <&cryptobam 2>, <&cryptobam 3>; + dma-names = "rx", "tx"; + }; |