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author | Peter Griffin <peter.griffin@linaro.org> | 2014-11-17 17:47:00 +0100 |
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committer | Maxime Coquelin <maxime.coquelin@st.com> | 2014-11-18 12:54:55 +0100 |
commit | cc149f7ae2fa54b3d067527642146dde37977358 (patch) | |
tree | 1cc2d82a3b87947c80394a3ed2493f8068a43978 | |
parent | 18221b8259a1987a49db41e26a7d60f183ca9f92 (diff) | |
download | op-kernel-dev-cc149f7ae2fa54b3d067527642146dde37977358.zip op-kernel-dev-cc149f7ae2fa54b3d067527642146dde37977358.tar.gz |
ARM: STi: DT: STiH410: Add defines for STiH410 DT clocks
Although most clock outputs are the same as stih407 SoC, stih410
also has some additional new clock outputs.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
-rw-r--r-- | include/dt-bindings/clock/stih410-clks.h | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/stih410-clks.h b/include/dt-bindings/clock/stih410-clks.h new file mode 100644 index 0000000..2097a4b --- /dev/null +++ b/include/dt-bindings/clock/stih410-clks.h @@ -0,0 +1,25 @@ +/* + * This header provides constants clk index STMicroelectronics + * STiH410 SoC. + */ +#ifndef _DT_BINDINGS_CLK_STIH410 +#define _DT_BINDINGS_CLK_STIH410 + +#include "stih407-clks.h" + +/* STiH410 introduces new clock outputs compared to STiH407 */ + +/* CLOCKGEN C0 */ +#define CLK_TX_ICN_HADES 32 +#define CLK_RX_ICN_HADES 33 +#define CLK_ICN_REG_16 34 +#define CLK_PP_HADES 35 +#define CLK_CLUST_HADES 36 +#define CLK_HWPE_HADES 37 +#define CLK_FC_HADES 38 + +/* CLOCKGEN D0 */ +#define CLK_PCMR10_MASTER 4 +#define CLK_USB2_PHY 5 + +#endif |