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author | Stephen Boyd <sboyd@codeaurora.org> | 2014-05-16 16:07:08 -0700 |
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committer | Mike Turquette <mturquette@linaro.org> | 2014-05-29 09:30:20 -0700 |
commit | aa014149ba002155a084ec1e9328e95b70167cbb (patch) | |
tree | fed95ebc328bbb28d089f97673f4b149c193b8b5 | |
parent | 18882ac5f38ec44e070c68728c2635bcdf60915f (diff) | |
download | op-kernel-dev-aa014149ba002155a084ec1e9328e95b70167cbb.zip op-kernel-dev-aa014149ba002155a084ec1e9328e95b70167cbb.tar.gz |
clk: qcom: Fix clk_rcg2_is_enabled() check
If the bit is set the clock is off so we should be checking for
a clear bit, not a set bit. Invert the logic.
Fixes: bcd61c0f535a (clk: qcom: Add support for root clock generators (RCGs))
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
-rw-r--r-- | drivers/clk/qcom/clk-rcg2.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/qcom/clk-rcg2.c b/drivers/clk/qcom/clk-rcg2.c index 00f878a..0996a3a 100644 --- a/drivers/clk/qcom/clk-rcg2.c +++ b/drivers/clk/qcom/clk-rcg2.c @@ -55,7 +55,7 @@ static int clk_rcg2_is_enabled(struct clk_hw *hw) if (ret) return ret; - return (cmd & CMD_ROOT_OFF) != 0; + return (cmd & CMD_ROOT_OFF) == 0; } static u8 clk_rcg2_get_parent(struct clk_hw *hw) |