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| author | Ralf Baechle <ralf@linux-mips.org> | 2012-11-30 17:27:27 +0100 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2012-12-13 18:15:24 +0100 |
| commit | f772cdb2bd544eeb3e83a8bb42629d155c1b53fd (patch) | |
| tree | bb368b90fd756fa08476fecb1efa3dea2f09f41f | |
| parent | d7ea335c05ba7c013615d1e0d5a71459eb4195e8 (diff) | |
| download | op-kernel-dev-f772cdb2bd544eeb3e83a8bb42629d155c1b53fd.zip op-kernel-dev-f772cdb2bd544eeb3e83a8bb42629d155c1b53fd.tar.gz | |
MIPS: Remove usage of CEVT_R4K_LIB config option.
Manuel Lauss <manuel.lauss@gmail.com> writes:
I introduced it as a fallback because early revisions of Alchemy hardware
we shipped had a non-functional 32kHz timer and had to rely on the r4k
timer instead. Previously the r4k timer was initialized regardless, but
it's useless with the "wait" instruction.
So long story short: I need either the on-chip 32kHz timer OR the r4k
timer if the 32kHz one is unusable, but not both, and r4k timer is useless
when au1k_idle is in use.
The current in-kernel Alchemy boards all work with the 32kHz timer, so I'm
not against removing R4K_LIB symbols.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| -rw-r--r-- | arch/mips/Kconfig | 6 | ||||
| -rw-r--r-- | arch/mips/include/asm/time.h | 2 | ||||
| -rw-r--r-- | arch/mips/kernel/Makefile | 2 |
3 files changed, 2 insertions, 8 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index b04b491..53470f0 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -54,7 +54,7 @@ choice config MIPS_ALCHEMY bool "Alchemy processor based machines" select 64BIT_PHYS_ADDR - select CEVT_R4K_LIB + select CEVT_R4K select CSRC_R4K select IRQ_CPU select SYS_HAS_CPU_MIPS32_R1 @@ -926,11 +926,7 @@ config CEVT_DS1287 config CEVT_GT641XX bool -config CEVT_R4K_LIB - bool - config CEVT_R4K - select CEVT_R4K_LIB bool config CEVT_SB1250 diff --git a/arch/mips/include/asm/time.h b/arch/mips/include/asm/time.h index 6be93a4..761f2e9 100644 --- a/arch/mips/include/asm/time.h +++ b/arch/mips/include/asm/time.h @@ -50,10 +50,8 @@ extern int (*perf_irq)(void); /* * Initialize the calling CPU's compare interrupt as clockevent device */ -#ifdef CONFIG_CEVT_R4K_LIB extern unsigned int __weak get_c0_compare_int(void); extern int r4k_clockevent_init(void); -#endif static inline int mips_clockevent_init(void) { diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile index d9abe17..540dff8 100644 --- a/arch/mips/kernel/Makefile +++ b/arch/mips/kernel/Makefile @@ -16,7 +16,7 @@ CFLAGS_REMOVE_perf_event_mipsxx.o = -pg endif obj-$(CONFIG_CEVT_BCM1480) += cevt-bcm1480.o -obj-$(CONFIG_CEVT_R4K_LIB) += cevt-r4k.o +obj-$(CONFIG_CEVT_R4K) += cevt-r4k.o obj-$(CONFIG_MIPS_MT_SMTC) += cevt-smtc.o obj-$(CONFIG_CEVT_DS1287) += cevt-ds1287.o obj-$(CONFIG_CEVT_GT641XX) += cevt-gt641xx.o |
