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authorJie Yang <yang.jie@intel.com>2015-01-21 07:20:23 +0800
committerMark Brown <broonie@kernel.org>2015-01-27 18:36:22 +0000
commit09a34aa582aec12c974b08c1ffedb9bd1940565a (patch)
tree762cbff0f65747502aa048074d4f18d08e73f9dd
parentf81677b4d1acc0e7cd74a43bfd9900d9512b90ae (diff)
downloadop-kernel-dev-09a34aa582aec12c974b08c1ffedb9bd1940565a.zip
op-kernel-dev-09a34aa582aec12c974b08c1ffedb9bd1940565a.tar.gz
ASoC: Intel: Used lock version to update shim registers
We need hold lock each time updating shirm registers, otherwise, we may set unexpected values to them when they are set in different thread at different time sequence. The notification work will be scheduled in global work queue, which won't hold this sst->spinlock itself, so here we need change to use the lock version to update shim registers. Signed-off-by: Jie Yang <yang.jie@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
-rw-r--r--sound/soc/intel/sst-haswell-ipc.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/sound/soc/intel/sst-haswell-ipc.c b/sound/soc/intel/sst-haswell-ipc.c
index 5bf1404..8156cc1 100644
--- a/sound/soc/intel/sst-haswell-ipc.c
+++ b/sound/soc/intel/sst-haswell-ipc.c
@@ -651,11 +651,11 @@ static void hsw_notification_work(struct work_struct *work)
}
/* tell DSP that notification has been handled */
- sst_dsp_shim_update_bits_unlocked(hsw->dsp, SST_IPCD,
+ sst_dsp_shim_update_bits(hsw->dsp, SST_IPCD,
SST_IPCD_BUSY | SST_IPCD_DONE, SST_IPCD_DONE);
/* unmask busy interrupt */
- sst_dsp_shim_update_bits_unlocked(hsw->dsp, SST_IMRX, SST_IMRX_BUSY, 0);
+ sst_dsp_shim_update_bits(hsw->dsp, SST_IMRX, SST_IMRX_BUSY, 0);
}
static struct ipc_message *reply_find_msg(struct sst_hsw *hsw, u32 header)
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