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| author | Alexey Skidanov <Alexey.Skidanov@amd.com> | 2014-07-08 17:30:17 +0300 |
|---|---|---|
| committer | Joerg Roedel <jroedel@suse.de> | 2014-07-09 16:02:41 +0200 |
| commit | 51499aa912e0d6f5b3497e2b1121309f579e78ed (patch) | |
| tree | 66d29ff2d54582357663322f38ed2df7ae6f9be4 | |
| parent | b00675b867d5fb59b341395c77d20655f7f2edf7 (diff) | |
| download | op-kernel-dev-51499aa912e0d6f5b3497e2b1121309f579e78ed.zip op-kernel-dev-51499aa912e0d6f5b3497e2b1121309f579e78ed.tar.gz | |
iommu/amd: Moving PPR fault flags macros definitions
Any kernel source registering the invalid PPR calback may include the header file with PPR fault flags macros definitions.
Thus we move them to include/linux/amd-iommu.h
Signed-off-by: Alexey Skidanov <Alexey.Skidanov@amd.com>
Signed-off-by: Oded Gabbay <oded.gabbay@amd.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
| -rw-r--r-- | drivers/iommu/amd_iommu_types.h | 6 | ||||
| -rw-r--r-- | include/linux/amd-iommu.h | 7 |
2 files changed, 7 insertions, 6 deletions
diff --git a/drivers/iommu/amd_iommu_types.h b/drivers/iommu/amd_iommu_types.h index f1a5abf..e5f1cd4 100644 --- a/drivers/iommu/amd_iommu_types.h +++ b/drivers/iommu/amd_iommu_types.h @@ -390,12 +390,6 @@ struct amd_iommu_fault { }; -#define PPR_FAULT_EXEC (1 << 1) -#define PPR_FAULT_READ (1 << 2) -#define PPR_FAULT_WRITE (1 << 5) -#define PPR_FAULT_USER (1 << 6) -#define PPR_FAULT_RSVD (1 << 7) -#define PPR_FAULT_GN (1 << 8) struct iommu_domain; diff --git a/include/linux/amd-iommu.h b/include/linux/amd-iommu.h index 15f6b9e..2b08e79 100644 --- a/include/linux/amd-iommu.h +++ b/include/linux/amd-iommu.h @@ -119,6 +119,13 @@ typedef int (*amd_iommu_invalid_ppr_cb)(struct pci_dev *pdev, extern int amd_iommu_set_invalid_ppr_cb(struct pci_dev *pdev, amd_iommu_invalid_ppr_cb cb); +#define PPR_FAULT_EXEC (1 << 1) +#define PPR_FAULT_READ (1 << 2) +#define PPR_FAULT_WRITE (1 << 5) +#define PPR_FAULT_USER (1 << 6) +#define PPR_FAULT_RSVD (1 << 7) +#define PPR_FAULT_GN (1 << 8) + /** * amd_iommu_device_info() - Get information about IOMMUv2 support of a * PCI device |
