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| author | Gabor Juhos <juhosg@openwrt.org> | 2013-01-29 08:27:04 +0000 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2013-01-30 21:43:11 +0100 |
| commit | fe950df70013a9f3368918aab697eec15f80ac67 (patch) | |
| tree | a225e686b25473dd7f1bf6e3540a859568c7d05c | |
| parent | 4c960910e2fb3a301ee4a504fa6b2c5204efeab0 (diff) | |
| download | op-kernel-dev-fe950df70013a9f3368918aab697eec15f80ac67.zip op-kernel-dev-fe950df70013a9f3368918aab697eec15f80ac67.tar.gz | |
MIPS: AR71xx: Fix AR71XX_PCI_MEM_SIZE
The base address of the PCI memory is 0x10000000 and the base address of the
PCI configuration space is 0x17000000 on the AR71xx SoCs.
The AR71XX_PCI_MEM_SIZE is defined as 0x08000000 which is wrong because that
overlaps with the configuration space. This patch fixes the value of the
AR71XX_PCI_MEM_SIZE constant, in order to avoid this resource conflicts.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4873/
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| -rw-r--r-- | arch/mips/pci/pci-ar71xx.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/pci/pci-ar71xx.c b/arch/mips/pci/pci-ar71xx.c index 1552522..6eaa4f2 100644 --- a/arch/mips/pci/pci-ar71xx.c +++ b/arch/mips/pci/pci-ar71xx.c @@ -24,7 +24,7 @@ #include <asm/mach-ath79/pci.h> #define AR71XX_PCI_MEM_BASE 0x10000000 -#define AR71XX_PCI_MEM_SIZE 0x08000000 +#define AR71XX_PCI_MEM_SIZE 0x07000000 #define AR71XX_PCI_WIN0_OFFS 0x10000000 #define AR71XX_PCI_WIN1_OFFS 0x11000000 |
