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authorThomas Gleixner <tglx@linutronix.de>2014-05-07 15:44:16 +0000
committerThomas Gleixner <tglx@linutronix.de>2014-05-16 14:05:21 +0200
commitb26d851ff1928b56242c4c5e16cb62bac2d9526c (patch)
treeef1325900428e72bcf4b520f77cba9ab2669fdb3
parent2aa799d891299457e4107d33f07a1ed5ac8849ae (diff)
downloadop-kernel-dev-b26d851ff1928b56242c4c5e16cb62bac2d9526c.zip
op-kernel-dev-b26d851ff1928b56242c4c5e16cb62bac2d9526c.tar.gz
tile: Use SPARSE_IRQ
Get rid of the private allocator and switch over to sparse IRQs. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Grant Likely <grant.likely@linaro.org> Cc: Tony Luck <tony.luck@intel.com> Cc: Peter Zijlstra <peterz@infradead.org> Acked-by: Chris Metcalf <cmetcalf@tilera.com> Link: http://lkml.kernel.org/r/20140507154338.423715783@linutronix.de Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
-rw-r--r--arch/tile/Kconfig2
-rw-r--r--arch/tile/include/asm/irq.h9
-rw-r--r--arch/tile/kernel/irq.c52
3 files changed, 9 insertions, 54 deletions
diff --git a/arch/tile/Kconfig b/arch/tile/Kconfig
index 85258ca..4f3006b 100644
--- a/arch/tile/Kconfig
+++ b/arch/tile/Kconfig
@@ -125,6 +125,8 @@ config HVC_TILE
config TILEGX
bool "Building for TILE-Gx (64-bit) processor"
+ select SPARSE_IRQ
+ select GENERIC_IRQ_LEGACY_ALLOC_HWIRQ
select HAVE_FUNCTION_TRACER
select HAVE_FUNCTION_TRACE_MCOUNT_TEST
select HAVE_FUNCTION_GRAPH_TRACER
diff --git a/arch/tile/include/asm/irq.h b/arch/tile/include/asm/irq.h
index 9670a39..1fe8691 100644
--- a/arch/tile/include/asm/irq.h
+++ b/arch/tile/include/asm/irq.h
@@ -18,10 +18,12 @@
#include <linux/hardirq.h>
/* The hypervisor interface provides 32 IRQs. */
-#define NR_IRQS 32
+#define NR_IRQS 32
/* IRQ numbers used for linux IPIs. */
-#define IRQ_RESCHEDULE 0
+#define IRQ_RESCHEDULE 0
+/* Interrupts for dynamic allocation start at 1. Let the core allocate irq0 */
+#define NR_IRQS_LEGACY 1
#define irq_canonicalize(irq) (irq)
@@ -76,7 +78,4 @@ void tile_irq_activate(unsigned int irq, int tile_irq_type);
void setup_irq_regs(void);
-unsigned int irq_alloc_hwirq(int node);
-void irq_free_hwirq(unsigned int irq);
-
#endif /* _ASM_TILE_IRQ_H */
diff --git a/arch/tile/kernel/irq.c b/arch/tile/kernel/irq.c
index 5fd197e..637f2ff 100644
--- a/arch/tile/kernel/irq.c
+++ b/arch/tile/kernel/irq.c
@@ -54,13 +54,6 @@ static DEFINE_PER_CPU(unsigned long, irq_disable_mask)
*/
static DEFINE_PER_CPU(int, irq_depth);
-/* State for allocating IRQs on Gx. */
-#if CHIP_HAS_IPI()
-static unsigned long available_irqs = ((1UL << NR_IRQS) - 1) &
- (~(1UL << IRQ_RESCHEDULE));
-static DEFINE_SPINLOCK(available_irqs_lock);
-#endif
-
#if CHIP_HAS_IPI()
/* Use SPRs to manipulate device interrupts. */
#define mask_irqs(irq_mask) __insn_mtspr(SPR_IPI_MASK_SET_K, irq_mask)
@@ -278,50 +271,11 @@ int arch_show_interrupts(struct seq_file *p, int prec)
return 0;
}
-/*
- * Generic, controller-independent functions:
- */
-
#if CHIP_HAS_IPI()
-int create_irq(void)
-{
- unsigned long flags;
- int result;
-
- spin_lock_irqsave(&available_irqs_lock, flags);
- if (available_irqs == 0)
- result = -ENOMEM;
- else {
- result = __ffs(available_irqs);
- available_irqs &= ~(1UL << result);
- dynamic_irq_init(result);
- }
- spin_unlock_irqrestore(&available_irqs_lock, flags);
-
- return result;
-}
-EXPORT_SYMBOL(create_irq);
-
-void destroy_irq(unsigned int irq)
-{
- unsigned long flags;
-
- spin_lock_irqsave(&available_irqs_lock, flags);
- available_irqs |= (1UL << irq);
- dynamic_irq_cleanup(irq);
- spin_unlock_irqrestore(&available_irqs_lock, flags);
-}
-EXPORT_SYMBOL(destroy_irq);
-
-unsigned int irq_alloc_hwirq(int node)
-{
- int ret = create_irq();
- return ret < 0 ? 0 : ret;
-}
-
-void irq_free_hwirq(unsigned int irq)
+int arch_setup_hwirq(unsigned int irq, int node)
{
- destroy_irq(irq);
+ return irq >= NR_IRQS ? -EINVAL : 0;
}
+void arch_teardown_hwirq(unsigned int irq) { }
#endif
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