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| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2014-05-19 19:23:26 +0300 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-05-20 21:06:33 +0200 |
| commit | 9aa7250feb202f246afd90d9525debabe10cc0a5 (patch) | |
| tree | 67f9407c8cc98a2a3760009227b5c5ab6adb9eb5 | |
| parent | 0f08ffd6633fe8b8306229593027009e90f86c8c (diff) | |
| download | op-kernel-dev-9aa7250feb202f246afd90d9525debabe10cc0a5.zip op-kernel-dev-9aa7250feb202f246afd90d9525debabe10cc0a5.tar.gz | |
drm/i915: Clear GDSR after reset on ILK
Clear the reset domain after a succesful GPU reset on ilk. We already
do that on gen4, so let's try to be a bit more consistent. And if
ether render or media reset fails, we might use the leftover value
in the register to pinpoint the culprit.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| -rw-r--r-- | drivers/gpu/drm/i915/intel_uncore.c | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c index b542bf6..4ec192b 100644 --- a/drivers/gpu/drm/i915/intel_uncore.c +++ b/drivers/gpu/drm/i915/intel_uncore.c @@ -1002,8 +1002,14 @@ static int ironlake_do_reset(struct drm_device *dev) I915_WRITE(MCHBAR_MIRROR_BASE + ILK_GDSR, ILK_GRDOM_MEDIA | ILK_GRDOM_RESET_ENABLE); - return wait_for((I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR) & - ILK_GRDOM_RESET_ENABLE) == 0, 500); + ret = wait_for((I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR) & + ILK_GRDOM_RESET_ENABLE) == 0, 500); + if (ret) + return ret; + + I915_WRITE(MCHBAR_MIRROR_BASE + ILK_GDSR, 0); + + return 0; } static int gen6_do_reset(struct drm_device *dev) |
