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authorPankaj Dubey <pankaj.dubey@samsung.com>2014-07-11 08:08:29 +0900
committerKukjin Kim <kgene.kim@samsung.com>2014-07-15 08:40:32 +0900
commitfce9e5bb25264153f9f002eada41757118d25ba9 (patch)
treefe13933c80c122ffd0cd782edfc2ef1535f86223
parent632b98ae8adbe12fda9d1f4cc6c0c177bcb44b1e (diff)
downloadop-kernel-dev-fce9e5bb25264153f9f002eada41757118d25ba9.zip
op-kernel-dev-fce9e5bb25264153f9f002eada41757118d25ba9.tar.gz
ARM: EXYNOS: Add support for mapping PMU base address via DT
Add support for mapping Samsung Power Management Unit (PMU) base address from device tree. Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
-rw-r--r--arch/arm/mach-exynos/common.h1
-rw-r--r--arch/arm/mach-exynos/exynos.c37
2 files changed, 38 insertions, 0 deletions
diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
index 152b464..f8daa9c 100644
--- a/arch/arm/mach-exynos/common.h
+++ b/arch/arm/mach-exynos/common.h
@@ -113,6 +113,7 @@ IS_SAMSUNG_CPU(exynos5800, EXYNOS5800_SOC_ID, EXYNOS5_SOC_MASK)
extern void __iomem *sysram_ns_base_addr;
extern void __iomem *sysram_base_addr;
+extern void __iomem *pmu_base_addr;
void exynos_sysram_init(void);
void exynos_firmware_init(void);
diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index 269526b..80cbbc7 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -19,6 +19,7 @@
#include <linux/of_platform.h>
#include <linux/platform_device.h>
#include <linux/pm_domain.h>
+#include <linux/irqchip.h>
#include <asm/cacheflush.h>
#include <asm/hardware/cache-l2x0.h>
@@ -31,6 +32,8 @@
#include "regs-pmu.h"
#include "regs-sys.h"
+void __iomem *pmu_base_addr;
+
static struct map_desc exynos4_iodesc[] __initdata = {
{
.virtual = (unsigned long)S3C_VA_SYS,
@@ -264,6 +267,39 @@ static void __init exynos_init_io(void)
exynos_map_io();
}
+static const struct of_device_id exynos_dt_pmu_match[] = {
+ { .compatible = "samsung,exynos3250-pmu" },
+ { .compatible = "samsung,exynos4210-pmu" },
+ { .compatible = "samsung,exynos4212-pmu" },
+ { .compatible = "samsung,exynos4412-pmu" },
+ { .compatible = "samsung,exynos5250-pmu" },
+ { .compatible = "samsung,exynos5420-pmu" },
+ { /*sentinel*/ },
+};
+
+static void exynos_map_pmu(void)
+{
+ struct device_node *np;
+
+ np = of_find_matching_node(NULL, exynos_dt_pmu_match);
+ if (np)
+ pmu_base_addr = of_iomap(np, 0);
+
+ if (!pmu_base_addr)
+ panic("failed to find exynos pmu register\n");
+}
+
+static void __init exynos_init_irq(void)
+{
+ irqchip_init();
+ /*
+ * Since platsmp.c needs pmu base address by the time
+ * DT is not unflatten so we can't use DT APIs before
+ * init_irq
+ */
+ exynos_map_pmu();
+}
+
static void __init exynos_dt_machine_init(void)
{
struct device_node *i2c_np;
@@ -344,6 +380,7 @@ DT_MACHINE_START(EXYNOS_DT, "SAMSUNG EXYNOS (Flattened Device Tree)")
.smp = smp_ops(exynos_smp_ops),
.map_io = exynos_init_io,
.init_early = exynos_firmware_init,
+ .init_irq = exynos_init_irq,
.init_machine = exynos_dt_machine_init,
.init_late = exynos_init_late,
.dt_compat = exynos_dt_compat,
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