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authorValentine Barshak <valentine.barshak@cogentembedded.com>2014-01-09 19:23:20 +0400
committerSimon Horman <horms+renesas@verge.net.au>2014-02-04 10:25:02 +0900
commit5a6f994abbfde8e17671541db04399dfc4aebe62 (patch)
tree8e99e9df93548ffb383e87cb071d45bd911001dc
parent64b7f9aca549db8a8bbcf68c911e9bd24efe76f7 (diff)
downloadop-kernel-dev-5a6f994abbfde8e17671541db04399dfc4aebe62.zip
op-kernel-dev-5a6f994abbfde8e17671541db04399dfc4aebe62.tar.gz
ARM: shmobile: r8a7791: Add ZS clock
This adds fixed ratio zs_clk to R8A7791 clocks. Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-rw-r--r--arch/arm/mach-shmobile/clock-r8a7791.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/mach-shmobile/clock-r8a7791.c b/arch/arm/mach-shmobile/clock-r8a7791.c
index 1074ba4..52d7d13 100644
--- a/arch/arm/mach-shmobile/clock-r8a7791.c
+++ b/arch/arm/mach-shmobile/clock-r8a7791.c
@@ -113,6 +113,7 @@ SH_FIXED_RATIO_CLK_SET(rclk_clk, pll1_clk, 1, (48 * 1024));
SH_FIXED_RATIO_CLK_SET(mp_clk, pll1_div2_clk, 1, 15);
SH_FIXED_RATIO_CLK_SET(zg_clk, pll1_clk, 1, 3);
SH_FIXED_RATIO_CLK_SET(zx_clk, pll1_clk, 1, 3);
+SH_FIXED_RATIO_CLK_SET(zs_clk, pll1_clk, 1, 6);
static struct clk *main_clks[] = {
&extal_clk,
@@ -128,6 +129,7 @@ static struct clk *main_clks[] = {
&cp_clk,
&zg_clk,
&zx_clk,
+ &zs_clk,
};
/* MSTP */
@@ -187,6 +189,7 @@ static struct clk_lookup lookups[] = {
CLKDEV_CON_ID("pll1_div2", &pll1_div2_clk),
CLKDEV_CON_ID("pll3", &pll3_clk),
CLKDEV_CON_ID("zg", &zg_clk),
+ CLKDEV_CON_ID("zs", &zs_clk),
CLKDEV_CON_ID("hp", &hp_clk),
CLKDEV_CON_ID("p", &p_clk),
CLKDEV_CON_ID("rclk", &rclk_clk),
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