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| author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2007-03-08 13:34:59 +0000 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2007-03-08 13:34:59 +0000 |
| commit | a45570ebf36c5408ce6cbfd3acd39edf1ada5cda (patch) | |
| tree | 2aacebaae5bdad8ae6b002d34ff6c9a910884120 | |
| parent | abc23585b9b625ad58db54ae0d180543db014eb8 (diff) | |
| parent | 474844f7083b2381db9b3523dc6de9108fc4c732 (diff) | |
| download | op-kernel-dev-a45570ebf36c5408ce6cbfd3acd39edf1ada5cda.zip op-kernel-dev-a45570ebf36c5408ce6cbfd3acd39edf1ada5cda.tar.gz | |
Merge branch 'omap-fixes' of master.kernel.org:/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6
| -rw-r--r-- | arch/arm/mach-omap1/board-h2.c | 1 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/clock.c | 1 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/clock.h | 3 |
3 files changed, 4 insertions, 1 deletions
diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c index 6e11307..ad51939 100644 --- a/arch/arm/mach-omap1/board-h2.c +++ b/arch/arm/mach-omap1/board-h2.c @@ -27,6 +27,7 @@ #include <linux/mtd/nand.h> #include <linux/mtd/partitions.h> #include <linux/input.h> +#include <linux/workqueue.h> #include <asm/hardware.h> #include <asm/mach-types.h> diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c index 0de201c..5170481 100644 --- a/arch/arm/mach-omap2/clock.c +++ b/arch/arm/mach-omap2/clock.c @@ -27,6 +27,7 @@ #include <asm/arch/clock.h> #include <asm/arch/sram.h> +#include <asm/div64.h> #include "prcm-regs.h" #include "memory.h" diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h index 8816f5a..162978f 100644 --- a/arch/arm/mach-omap2/clock.h +++ b/arch/arm/mach-omap2/clock.h @@ -1013,7 +1013,8 @@ static struct clk dss2_fck = { /* Alt clk used in power management */ .name = "dss2_fck", .parent = &sys_ck, /* fixed at sys_ck or 48MHz */ .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | - RATE_CKCTL | CM_CORE_SEL1 | RATE_FIXED, + RATE_CKCTL | CM_CORE_SEL1 | RATE_FIXED | + DELAYED_APP, .enable_reg = (void __iomem *)&CM_FCLKEN1_CORE, .enable_bit = 1, .src_offset = 13, |
